Other Parts Discussed in Thread: DAC38RF97
I use LMK04828 SDCLKOUT for DAC38RF97's and FPGA Artix-7's SYSREF. At the FPGA side, LVDS_25 bank is used, where there are internal 100ohms termination resistors but no bias. In the reference design of DAC38RF97, 0.1uf capacitors are used (AC coupling) between LMK04828 and FPGA XC7. For this AC coupling may cause not enough signal swings for LVDS_25 in the FPGA side. So the question whether it should be AC coupling or DC coupling (by replacing 0.1uf capacitors) for the Clock connections between LMK04828 and FPGA XC7A200T-2FBG676?
