CDCE925: CDCE925 Power Supply Sequence

Bob Green

Part Number: CDCE925

Section 11 of the data sheet mentions that the VDD pin should be grounded when VDD_OUT is applied first. This doesn't make sense to me. In my case the 1.8V VDD supply is derived from the 3.3V Supply for VDD_OUT so VDD_OUT will be applied first. I need to know how to best handle this situation, do I need a fet circuit on the VDD_OUT pin to handle the sequencing? Please advise.

over 2 years ago

0 vicente flores prado over 2 years ago

TI__Mastermind 20051 points

Hi Bob,
There are no requirements for the power up sequence; it does not matter which powers up first.

Regards,

Vicente

0 Bob Green over 2 years ago in reply to vicente flores prado

Prodigy 40 points

Hi Vincent,

The datasheet clearly states that bringing up VDDOUT before VDD involves risk of high current on the VDD out pin. Are you saying that this statement is in fact incorrect?

0 vicente flores prado over 2 years ago in reply to Bob Green

TI__Mastermind 20051 points

Good afternoon Bob,

Please refer to these previous E2E posts for explanations on the types and effects of different power sequencing

https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/638011/cdce913-power-supply-recommendations-of-vdd-and-vddout?tisearch=e2e-sitesearch&keymatch=cdce%2525252525252A%25252525252520AND%25252525252520power%25252525252520sequ%2525252525252A#

e2e.ti.com/.../cdce913-power-up-sequence

Regards,

Vicente

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CDCE925: CDCE925 Power Supply Sequence