Hi There,
We are planning to interface HCMOS output of OCXO clock oscillator to CLKIN of CDCLVC1102 LVCMOS buffer chip. Can we do this?
HCMOS output logic level is 90% VDD (it is 2.97V as we operate at 3.3V power) and VOL (max) is 10% of VDDD=0.33V. Whereas clock buffer has Vih min of 2.25V and Vil max of 1.05V.
So it looks okay to interface as per my understanding. But i am not sure whether any other points to be considered to connect HCMOS output to LVCMOS input? Please share your comments.
Regards,
Murugan