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LMX2592: New design with direct FM modulation

Part Number: LMX2592

I would like some advice for a new design using the LMX2592.  This is a fixed frequency synthesizer, with a small variation about the nominal frequency. The nominal output frequency is 6.834682GHz.  The maximum tuning range is +/- 1kHz. Also required is square wave FM at a modulation frequency of 120Hz, achieved by writing to the fractional register every  4.16ms. The deviation will be up to 200Hz peak.

I have used this method of generating FM on other synthesizers, usually with success. The method depends on an "on the fly" change of the fractional register without any reset of the integer register, or  reset of the fractional register to the seed value.  Frequency calibration must be  disabled.

  This synthesizer will operate for long periods, potentially several years without a power on reset. Initial setup of the registers on reset can be followed by a frequency calibrate, however during operation this is not possible due to the FM requirement. I note that a temperature change of 125degC is allowed without the VCO drifting out of lock. As the operating temperature in this design will be between +40 and +85degC this requirement is fulfilled. However please confirm that there is no long term drift mechanism that could cause unlock.

With a 20MHz PD frequency, the divider value is 341.7341.  The fractional value of  0.7341 allows adequate room to implement the FM and tuning requirement without changing the N divider.

  Unfortunately I have to use a 10MHz reference frequency. I can use the ref doubler, but please confirm that I cannot use the reference multiplier as the values in section 7.3.2 table 1 are not met.

Please comment on this design.

regards

Cosmo Little

  • Hi Cosmo,

    Right, if the ref doubler is enabled, the Multiplier cannot be used. 

    10MHz is a bit low in frequency, make sure use square wave clock. Clipped-sine wave clock is not ideal as the slew rate is still not good at this frequency. 

    VCO frequency drift over temperature and aging has been taken care in design, I am pretty sure that it will remain lock without a re-calibration.

  • Dear Noel,

    Point taken about clock slew rate.

    Could you please comment on the FM modulation scheme. This will only work if writes to the fractional numerator do not reset any registers or initiate a calibration cycle.

    The TICS Pro software lists registers 68,69, and 70 for the LMX2592. These registers are not mentioned in the data sheet. What are they used for?

    I cannot find a bit that reverses the polarity of the phase detector. This is required if an inverting active loop filter is used.

    Are there any hidden bits that control register resets when programming?

    The data sheet implies that new data is written to the addressed register after 24 clock pulses.  Please confirm that it is not necessary to toggle the chip select between register writes.

    best regards

    Cosmo Little

  • Hi Cosmo,

    You only need to change the fractional numerator a little bit to achieve the modulation depth, this change does not need to re-calibrate the VCO, Vtune is able to support this change well. 

    Registers 68 to 70 are read only registers, they provide the VCO parameters that are obtained from a VCO calibration. Please download the latest revision datasheet for details.

    Phase detector polarity reversal is not supported.

    R0[1] is the only reset bit we have.

    The written register value will shift to the logic engine immediately at the rising edge of the 24th SPI clock instead of the rising edge of CSB. However, we still need to toggle the CSB between registers.