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CDCI6214: Some basic operational questions

Part Number: CDCI6214
Other Parts Discussed in Thread: CDCE6214

This goes for both CDCE6214 and CDCI6214.
Assuming REFSEL = HIGH and PRIREF_P/N is our Input using LVCMOS input clock.
Can you confirm the below please?

1) The PRIREF_N should be connected directly to GND? Or should it be pulled-down through a resistor? Recommended value...?

2) The SECREF is unused, and so both SECREF_P/N pins should be left floating. Yes?

3) For CDCI6214 we want the HCSL 50Ω termination resistors as close to the 33Ω resistors as possible, right?
I ask because that is how they were designed in our AM65xx PCIe reference design.TMDX654GPEVM 1L PCIe / USB3.1 PCB Layout


  • Hi Darren, 

    1. Correct, unused input should be connected to GND. 

    2. Correct, if both pins for SECREF are not being used, they should be left floating. 

    3. Correct, for HCSL, place close to driver. 



  • Hi Vicente,

    One more point...I noticed the normal mode output impedance for CDCx6214 is 28Ω typical.
    If we are trying to design for 50Ω single-ended impedance (LVCMOS), wouldn't we prefer the series resistors be 22Ω, not 33Ω?

    Also, is there a reason we need the 50Ω termination resistors close to the driver?
    This E2E post mentions if the traces are long, then having them close to the receiver could improve performance. 

    My thought is that since these are PCIe clocks they usually go to high-density BGA-type processors. Because of that, it is very hard to put termination near the receiver; and so the goal is to keep traces short and keep termination near the driver. Still, putting them closer to the receiver helps attenuate reflections at the far-end; but is there a trade-off?

    I mean, the 50Ω are not just for helping prevent reflections, but provide the current path needed for the driver right?
    Having them too far away could also cause propagation delays and voltage drop (current has to pass through the whole trace)...?

    Is that understanding correct?


  • Hi Darren, 
    That is correct, the normal mode output impedance for LVMOS is 28 ohms typically. If you're trying to design an output LCMOS trace matched to a 50 ohms transmission line, the series resistor should be 22. Note, typically LVCMOS is high Z and  we don't even need the series resistance. That's why the slow mode has a typical output impedance of 80 ohm. When this is the case you no longer need the series resistor of Rs since the impedance is already higher than 50 ohms, we can just connect the driver directly to the receiver.

    The reason you want a 50 ohm termination near the receiver is for signal integrity reasons. If you have the 50 ohm terminations near the driver, the waveforms signal integrity is good all along the trace. Whereas if you put the 50 ohm terminations near the receiver, the waveforms signal integrity is good only toward the end of the trace. Having the 50 Ohm terminations closer to the driver is actually preferred for PCIe applications. 

    The 50 ohm in LVCMOS is prevent reflections between both devices. Say the output impedance is only 17 ohms, you would need a 33 ohm series resistance so it add up to 50 ohms which then prevents reflections occurring back and forth between the driver and receiver.