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CDCI6214: No clock output if 4.7K-ohm pull high at RESETN

Part Number: CDCI6214

Dear team,

We are using CDCI6214 but face to no output clock issue if we design 4.7K-ohm pull high and 2.2uF to Ground at RESETN pin (pin#8).

After remove 4.7k-ohm, it will output normal with no issue.

Follow datasheet recommendation, we will need 4.7k-ohm pull high even device have internal pull high.

My question is, did we need 4.7k-pull high resistor at RESETN pin?

or we just need to follow datasheet sequence recommendation, which is  VDD rise to 95% within 2ms and hold RESETN at low before VDDREF to 95%, and 4.7k-ohm not must to have,

With 4.7K-ohm pull high, the sequence follow datasheet recommend but no output clock.

Remove 4.7k-ohm, sequence follow datasheet recommend and have output clock.

Schematic

Regards,

Ben

  • Hi Ben

    or we just need to follow datasheet sequence recommendation, which is  VDD rise to 95% within 2ms and hold RESETN at low before VDDREF to 95%, and 4.7k-ohm not must to have,

    Yes, this is the main recommendation that needs to be followed. As long as VDD rises to 95% within 2ms and RESET is held low during this period, that is all that matters. 

    Regards, 

    Vicente