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LMX2541: Using Two PLL on the Same Micowire Bus

Part Number: LMX2541
Other Parts Discussed in Thread: LMX2592

Hello E2E Experts,

Good day.

We use two PLL LMX2541SQ3740E on the same Microwire bus and use the chip in "Full Chip Mode".
Programming is done only once.

On page 37, the following information is written:

• After the programming is complete, the CLK, DATA, and LE signals should be returned to a low state.
• When using the part in Full Chip Mode with the Integrated VCO, LE should be kept high no more than 1 us
after the programming of the R0 register. Failure to do so may interfere with the digital VCO calibration.

Now came the question up how to use the CLK, Data and Lacth enable signal correctly if we program both PLL1 and PLL2 in sequence.
 
Is it fine if we keep LE1 low if we start programming the second PLL2 or is it better to pull LE1 high during the programming of the second chip with LE2? We thought, bringing LE1 high would avoid clocking new data into PLL1.
Thank you in advance for your support.
Regards,
CSC