LMK03328: Hard Pin Mode(ROM Mode)

Rupesh Malavi

Prodigy 10 points

Part Number: LMK03328

Hi Team TI,

We are using LMK03328 in Hard Pin Mode(ROM Mode). We want to load the below default configuration as default.

Our O/P clock requirement = 100MHz LVCMOS clock single ended ( its default on OUT4).

Input we have as below,

Clock input = 100MHz, PRI_P.

do we need to change it?

Let us know, what is primary or secondary clock requirement for above configuration to load?

Also can we change it in SW Pin mode if we use above configuration?

over 1 year ago

0 Kadeem Samuel over 1 year ago

TI__Genius 12380 points

Rupesh,

I just want to make sure that I understand your application and question correctly.

The application is that you want the configuration for GPIO[5:0] = 7 for outputs 4-7, with a single-ended LVCMOS clock (not crystal) on the PRIREF_P pin, with the desire to use a 100MHz input clock, correct?

What do you mean exactly by the question " what is primary or secondary clock requirement for above configuration to load?" Per the below thread, you can use a 100MHz clock on PRIREF and use an XTAL to power up with:

https://e2e.ti.com/support/clock-timing-group/clock-timing-internal/f/clock-timing---internal-forum/1032744/lmk03328-eeprim-and-clock-generation-questions/3819959?tisearch=e2e-sitesearch&keymatch=lmk03328%2525252520secref#3819959

Changing to HW_SW_CTRL = 0 transitions the device from hard pin mode to soft pin mode - this also requires toggling the PDN pin after to trigger a device power cycle.

Please let me know if none of this makes sense, or if any of it is unclear.

Thanks,

Kadeem

0 Rupesh Malavi over 1 year ago in reply to Kadeem Samuel

Prodigy 10 points

Kadeem Samuel said:
The application is that you want the configuration for GPIO[5:0] = 7 for outputs 4-7, with a single-ended LVCMOS clock (not crystal) on the PRIREF_P pin, with the desire to use a 100MHz input clock, correct?

Yes, correct.

Kadeem Samuel said:
What do you mean exactly by the question " what is primary or secondary clock requirement for above configuration to load?" Per the below thread, you can use a 100MHz clock on PRIREF and use an XTAL to power up with:

will LMK03328 able generate 100MHz on channel 4-7 with GPIO[5:0] = 7 & pri_p =100MHz LVCMOS input settings? or do I need to provide any other pri_p reference clock to generate 100MHz 0n channel 4-7?

0 Kadeem Samuel over 1 year ago in reply to Rupesh Malavi

TI__Genius 12380 points

Rupesh,

Let me check this in the lab on a board to confirm that another (likely 50 MHz, if so) clock is not required.

I will have a response for you by end of day Thursday.

Thanks,

Kadeem

0 Kadeem Samuel over 1 year ago in reply to Kadeem Samuel

TI__Genius 12380 points

Rupesh,

For ROM7, the input clock on PRIREF_P will need to be 25 MHz. Using a 100 MHz clock will not work for loading the configuration from ROM without making further changes to the device registers, specifically the R divider of PLL1.

Thanks,

Kadeem

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LMK03328: Hard Pin Mode(ROM Mode)