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LMK03318: LMK03318 PLL filter parameters

Adam Polus
Prodigy 30 points
Part Number: LMK03318

HI Support, 

I am using TICSpro to generate configuration file for the LMK03318.

I am trying to come up with PLL filter parameters and failing - please help. 

Datasheet (SNAS669E –SEPTEMBER 2015–REVISED APRIL 2018) indicates to use "WEBENCH Clock Architect Tool simulator". 

Found web based tool ("webench.ti.com/.../") that doesnt appear to be helpful with PLL filter design - if it is how to use it?  

Where/what is the tool that replaced "WEBENCH Clock Architect Tool"?

Tried to use the "PLLatinum SIM" - is this correct tool or other should be used?

When using "PLLatinum SIM" i am missing some needed parameters  like Kvco and VCOCap - where to get CORREC values for those)? Tool indicates ""VCOcap/minHighCap restricts BW" or DESIGN FAILUR when "calculate Loop filter" was clicked.

please help.to come up with PLL filter parameters.

Adam

  • 0
    TI__Mastermind 18990 points

    Adam,

    Please use PLLatinum Sim to calculate parameters instead of WEBENCH.

    The VCO gain and VCOCap should not be adjusted - the default values of 55 MHz/V and 0 pF are meant to be kept constant.

    In general, the settings listed in TICS Pro are a good starting point for some of the components:

    You can restrict the C2 value in PLLatinum Sim, and then let the software calculate the remaining values:

    From here, the closest capacitor/resistor values available in the part can be used as a starting point.

    Thanks,

    Kadeem