Hi Sir,
We have encountered a problem, please help us answer it,
We pull-up the CLK IN signal(ZQSFP_ePPS) to 3.3V, but the output Y0 always Low,
Refer to Output Logic table, I think the Input is High level, the output should be High,
Please help explain why it is low?
When we skip clock buffer, ec_ptp_trigger_in[0] goes back to high.
Thanks.
