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LMX2615-SP: Minimum reference input voltage and LVDS/LVPECL Oscin

Part Number: LMX2615-SP
Other Parts Discussed in Thread: LMX2594

Tool/software:

Hi,

We are looking to apply an LVPECL clock to the Oscin of the LMX2615-SP. This clock is 10 MHz and produces a 1Vpp-diff (500mV-single-ended) swing. The Electrical Characteristics for the LMX2615-SP imply this may not be sufficient, but the way it is specified and tested is confusing. Snippet below

First, there are essentially two minimums given for a 10 MHz clock. I assume using the lower 0.8 V value is okay?

Second, this is characterized for a single-ended signal with the other end terminated. My signal is differential. Am I compliant because the differential swing exceeds 0.8V, or am I non-compliant because each leg of my clock is only swinging about 0.5V?

To add to the confusion, I question if the "Reference input voltage" requirement applies at all for differential clocks. In section 8.1.2 the datasheet recommends an LVDS clock is used. LVDS generally produces differential swing below 0.8 V. If the specification above is only intended for single-ended clocks, what is the minimum swing for differential clocks?

I will finally note that the commercial LMX cousins such as the LMX2594 have a much lower Reference Input Voltage of 0.2 V, which is consistent with the signaling standards it seems intended to support. Please advise soon as we are in the process of final schematic & board review.

  • First, there are essentially two minimums given for a 10 MHz clock. I assume using the lower 0.8 V value is okay?

    Your assumption is correct. One value is "below 10MHz", with a < sign, and the other is "inclusive of 10MHz", with a ≤ sign. 0.8V is intended to go with 10MHz.

    Second, this is characterized for a single-ended signal with the other end terminated. My signal is differential. Am I compliant because the differential swing exceeds 0.8V, or am I non-compliant because each leg of my clock is only swinging about 0.5V?

    There's a certain minimum amplitude needed to ensure the 50Ω AC-coupled signal doesn't decay below acceptable levels by one full period, but in practice this can be a function of input capacitor size. The main factor affecting performance at the reference input is the input slew rate and subsequent amplitude-modulation -> phase-modulation conversion of input phase noise, and since sine wave slew rate is proportional to amplitude and frequency, each doubling of the frequency reduces the required minimum amplitude by half.

    But you have a differential LVPECL input clock, which has much higher slew rate than a comparable sine wave. So the minimum amplitude requirements are not critical in this case. I think there's no problem with your LVPECL input as described.

    It's also valid (not "equivalent", but "at least equivalent, if not better") to treat your ±0.5Vpp differential LVPECL as equivalent to a 1Vpp single-ended sine wave. So again, no problems here.

    If the specification above is only intended for single-ended clocks, what is the minimum swing for differential clocks?

    It's not clear. I don't see any differential input sensitivity testing in our validation data, and I don't see it in our spec anywhere.

    There's an absolute amplitude limit of around -15dBm (55mV) for absolute input sensitivity at 5MHz, which drops below -20dBm by 10MHz and is below -40dBm at 100MHz. There's no significant sensitivity limits. Again, the bigger problem is input slew rate, which your LVPECL signal certainly satisfies.

    In the absence of better guidance, I'd suggest treating the absolute magnitude of a differential signal ( |Vp - Vm| ) as functionally equivalent to the absolute magnitude of the single-ended sine wave (Vpp). As stated above, the increased slew rate of differential signaling standards like LVDS or LVPECL will perform better than differential sine-waves of the same amplitude.

    ---

    In summary, I think you have nothing to worry about with 10MHz LVPECL with ±0.5V differential amplitude. I'll make a note that we need to clarify single-ended vs differential electrical characteristics in the datasheet for all of these devices.

  • Thanks Derek, your explanation of the origins of that specification with respect to the interplay between amplitude, slew rate, and phase noise makes sense. While the electrical characteristics feel a little incomplete in this regard, your reply makes me feel comfortable proceeding. Thank you for the quick and thorough response.

    Best,

    Azad