CDCE6214-Q1: Programming

Hello, Cris,

I am hardware engineer in Continental. Thanks for your reply.

Here are some further questions.

1, Does that mean "EEPROM programming" is "must" before the chip can run? Or SOC configuring registers after power-on is also OK?

2, As showed in your PPT, it seems TICSPro is a convenient tool. How can I get it? Especially its hardware.

3, There are 2 chips in my application, and they are on one I2C bus. Because the slave address is fixed to 68h, how can SOC access 2 chips with the same address? Does that mean TICSPro programming must be done before my board is fully powered-on with SOC working?

4, As showed below in datasheet. TI can provide one factory configuration in EEPROM from the following 2 options. I can choose one. Correct?

Thanks a lot.

Hello, Kadeem

Still some questions about CDCE6214-Q1. It seems the chip is not easy to use.

1, I propose my application as following picture. Is that clear enough to see? Do you think that is feasible?

In this proposal, SOC can access 2 chips with different address.

The first CDCE6214-Q1 is under fall-back mode after power-on, without EEPROM initialization. EEPROM can be programmed after power-on.

The second CDCE6214-Q1 is under serial interface mode after power-on, with EEPROM page 1 initialization. EEPROM can be re-programmed after that.

2, For TICS Pro software, just "TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices" is needed, correct?

I don't know "TICSPRO2-GUI — Programming sequence generation and EVM programming tool for clocking devices" is also needed or not.

For TICS Pro hardware, as far as my understanding, I needs one converter of USB-I2C, as following illustration. How can I get that?

3, If 2 chips are on one I2C bus, at the first time power-on, I think 2 chips can't work under "serial interface mode" because their I2C addresses are conflicted. Correct? 

4, I am still confused about "factory programmed". It seems the option 2: "100-MHz LP-HCSL with 25-MHz XTAL and HW_SW_CTRL = H. The 25-MHz output on OUT0 is enabled." is just my requirement. Does that mean I can directly use your delivered chips with well-done EERPOM, without any EERPOM programming needed? 

Thanks a lot.

Hello, Cirs,

Thanks for your professional reply.

1, No, the device need not be programmed every time upon power-up, just need be done on the first time. Generally, our board software can't run twice with different process. The first time is specially for CDCE6214-Q1 EEPROM programming, and the second time and afterwards are for normal working with EEPROM startup. That is not feasible, but I have not good idea. So, maybe I can't count on SOC on my board to perform EERPOM programming, and TICS Pro must be used. In this case, before the first time power-on, I need remove the I2C connection between SOC and 2 CDCE6214-Q1 chips, and set up the connection between TICS Pro and 2 chips. After board power-on and EEPROM programming is done, I2C connection between SOC and 2 chips will be recovered. Next time power-on, chips can startup with programmed EEPROM. If you had other ides, could you like let me know?

2, About TICS Pro application, still some questions:

1) When TICS Pro is used for EERPOM programming, CDCE6214-Q1 need be set in fall-back mode?

2) There are 2 CDCE6214-Q1 chips on my boards and they are on the same I2C bus with address 0x67. How can TICS Pro differentiate them?

3) I need connect I2C on my board to USB2ANY. What I2C voltage value does USB2ANY request? 3.3V or 1.8V? I'd like 1.8V.

4) "SLVC622 — USB2ANY Explorer Installer v2.7.0.0". I just need download this driver for USB2ANY? If not, could you let me know the correct driver link?

5) PDN pin must be high before TICS Pro programming, correct?

4, I apply CDCE6214-Q1 to provide 100M Ref clock to my PCIE4.0 switch and 4 RC boards. I repeat my design as following. Please help double check whether your "factory programmed" chip can directly work under that, without EERPOM re-programming needed.

1) 1.8V for all power supply.

2) SECREF for 25M crystal input.

3) REFSEL = low.

4) PDN is high after power-on delay.

5) HW_SW_CTRL = high.

6) OUT0 output is 25MHz for cascading to the second CDCE6214-Q1's input.

7) 4-channel 100MHz LP_HCSL output.

Thanks a lot.

Hello, Cirs,

Thanks for your professional reply.

1, No, the device need not be programmed every time upon power-up, just need be done on the first time. Generally, our board software can't run twice with different process. The first time is specially for CDCE6214-Q1 EEPROM programming, and the second time and afterwards are for normal working with EEPROM startup. That is not feasible, but I have not good idea. So, maybe I can't count on SOC on my board to perform EERPOM programming, and TICS Pro must be used. In this case, before the first time power-on, I need remove the I2C connection between SOC and 2 CDCE6214-Q1 chips, and set up the connection between TICS Pro and 2 chips. After board power-on and EEPROM programming is done, I2C connection between SOC and 2 chips will be recovered. Next time power-on, chips can startup with programmed EEPROM. If you had other ides, could you like let me know?

2, About TICS Pro application, still some questions:

1) When TICS Pro is used for EERPOM programming, CDCE6214-Q1 need be set in fall-back mode?

2) There are 2 CDCE6214-Q1 chips on my boards and they are on the same I2C bus with address 0x67. How can TICS Pro differentiate them?

3) I need connect I2C on my board to USB2ANY. What I2C voltage value does USB2ANY request? 3.3V or 1.8V? I'd like 1.8V.

4) "SLVC622 — USB2ANY Explorer Installer v2.7.0.0". I just need download this driver for USB2ANY, correct? If not, could you let me know the correct driver link?

5) PDN pin must be high before TICS Pro programming, correct?

4, I apply CDCE6214-Q1 to provide 100M Ref clock to my PCIE4.0 switch and 4 RC boards. I repeat my design as following. Please help double check whether your "factory programmed" chip can directly work under that, without EERPOM re-programming needed.

1) 1.8V for all power supply.

2) SECREF for 25M crystal input.

3) REFSEL = low.

4) PDN is high after power-on delay.

5) HW_SW_CTRL = high.

6) OUT0 output is 25MHz for cascading to the second CDCE6214-Q1's input.

7) 4-channel 100MHz LP_HCSL output.

Thanks a lot.

Yufeng,

yufeng.zhang said:

If you had other ides, could you like let me know?

For mass production, we generally recommend programming the EEPROM of the devices prior to board mounting. But for this case I have a question, how are the REF_SEL and HW_SW_CTRL pins configured? Are they pulled High/Low with resistors or can they be controlled through software?

If they're software controllable, then it is feasible for the SOC to program the EEPROM of the devices.

If they're pulled with resistors, then yes, using TICSPro for initial EEPROM programming may be a solution. 

I would like to point out, however, that if one of the devices is using EEPROM Page1 [the LP-HCSL configuration] then it will not have I2C access. In this case, then the conflicting I2C address should not be an issue.

yufeng.zhang said:

About TICS Pro application, still some questions

1. No, the device does not need to be in fallback mode. EEPROM Page0 (REF_SEL and HW_SW_CTRL pulled Low) will also have I2C communication, so the EEPROM can be programmed. The I2C address will be 0x68 by EEPROM Page0 default.

2. TICSPro is able to read the serial number of the device to differentiate between the two, despite them having the same I2C address.

3. The USB2ANY interface adapter requires 3.3V, however it draws this from the PC, not the board.

4. Yes and then the USB2ANY should be functioning with TICSPro

5. Correct, PDN must be High for device communication.

yufeng.zhang said:

I apply CDCE6214-Q1 to provide 100M Ref clock to my PCIE4.0 switch and 4 RC boards. I repeat my design as following. Please help double check whether your "factory programmed" chip can directly work under that, without EERPOM re-programming needed.

Set REF_SEL = Low and HW_SW_CTRL=High before PDN is pulled High.

Best,

Cris

Hello, Cris,

Thanks for reply.

1, 

Cris Kobierowski said:

If they're software controllable, then it is feasible for the SOC to program the EEPROM of the devices.

If REF_SEL and HW_SW_CTRL pins were software controllable,  how does SOC set them when programming EERPOM? 

I found the following description in the datasheet , why is I2C not available when HW_SW_CTRL is low?

"REFSEL and HW_SW_CTRL pins can be High, Low or High-Z. For factory programmed device, I2C
interface is not available when HW_SW_CTRL is LOW." 

2,

Cris Kobierowski said:

I would like to point out, however, that if one of the devices is using EEPROM Page1 [the LP-HCSL configuration] then it will not have I2C access.

Why will it not have I2C access?

3,

Cris Kobierowski said:

1. No, the device does not need to be in fallback mode. EEPROM Page0 (REF_SEL and HW_SW_CTRL pulled Low) will also have I2C communication, so the EEPROM can be programmed. The I2C address will be 0x68 by EEPROM Page0 default.

What are requirements for setting REF_SEL and HW_SW_CTRL when TICS Pro is used for programming?

4,

Cris Kobierowski said:

2. TICSPro is able to read the serial number of the device to differentiate between the two, despite them having the same I2C address.

As showed in "8171.CDCE6214 Programming.pptx", 

I am still confused, how can TICSPro identify 2 chips with the same address?

5,

Cris Kobierowski said:

3. The USB2ANY interface adapter requires 3.3V, however it draws this from the PC, not the board.

But VDD_REF feeding on my board is 1.8V, will there be a correct communication between USB2ANY and PC?

6, What hardware interface need I place on on my board for connection with USB2ANY? 

Thanks again.

One note for point 5.

Who will provide I2C pull up? USB2ANY or my board? There is already 1.8V I2C pull-up on my board.  If USB2ANY also provides 3.3V pull-up, that would be problem due to power domain cross between 1.8V on my board and 3.3V on USB2ANY. 

Yufeng,

My apologies, I got the default EEPROM Page0 and Page1 settings confused in my previous response. Kadeem is correct with his response.

Best,

Cris

1，

Kadeem Samuel said:

CDCE6214 does not have I2C access on EEPROM Page 0, per the datasheet: P

As showed in datasheet, “The LSB bit of the device can be programmed in the EEPROM. For example, if I2C_A0 is programmed H in
Page 0 of EEPROM, setting HW_SW_CTRL=0 would set I2C address as 69h.”

If there was not I2C access in EEPROM page 0 startup, why can HW_SW_CTRL be set to 0 with I2C address=69H startup?

2, As information in the previous answers, "There are two pages of EEPROM. When HW_SW_CTRL is low at startup, the LVDS page is selected. When HW_SW_CTRL is high at startup, the LP-HCSL page is selected."

Does that mean chip can't work under both "LVDS output“ and "I2C access"? , because I2C access is not available under EEPROM page 0 startup.

3,

Kadeem Samuel said:

When using TICS Pro for programming, our recommendation is to have HW_SW_CTRL and REF_SEL at mid level to start in fall-back mode (which will ALWAYS have I2C access)

That is very inconvenient, because that means I must place hardware jumpers on "HW_SW_CTRL" and "REF_SEL" to set different modes for programming and normal working, if TICS Pro is used.

4, As you said "TICS Pro (and any I2C host) can always write commands to two devices with the same address, but cannot differentiate between the two when reading."

Does that mean 2 chips can only share one programming? because the same content is written in 2 chips. If yes, that is not acceptable.

5, Finally, is there any hardware reference design for 2 chips application? 

Thanks.

Hello, Kadeem,

Here is my proposal. I try to avoid many controls on HW_SW_CTRL, REF_SEL and I2C disconnection. Many controls means IO resources expense, no matter for FPGA or SOC. Please help me check whether it is OK.

1, REF_SEL is set fixed as that in the normal work mode. 2 chips are on one I2C bus. Just HW_SW_CTRL can be set with high or low, that is controlled by SOC (for software programming) or hardware jumper (for TICS Pro programming).

2, Chips are factory programmed devices. Set the 1st chip's  HW_SW_CTRL=H (I2C address=68H), and 2nd chip's HW_SW_CTRL=L (no I2C access). Power on. Program the 1st chip, because the 2nd chip's I2C access is invalid. After programming, 1st chip's I2C address is changed to 69H. (Can the page 0 be programmed under HW_SW_CTRL=H?)

3,  Power down. Set the 1st chip's HW_SW_CTRL=L (I2C address=69H), and 2nd chip's HW_SW_CTRL=H (I2C address=68H). Re-power on. Program the 2nd chip.

4, Set 2 chips' HW_SW_CTRL as that in the normal work mode. Power down and re-power on for normal work. 

One key point is, in step 2, "2nd chip's HW_SW_CTRL=L (no I2C access)" does not impact I2C bus, just does show high impedance on IO pins.

Thanks.

Hello, Kadeem,

Please confirm whether the I2C pins are high impedance without any impact to other devices on I2C bus, when the factory delivery chip starts with HW_SW_CTRL=L (no I2C access).

Besides, do you think I2C can be used just for EEPROM programming, and it is not needed for software during normal work? If yes, the other proposal is: I can remove I2C connection between SOC and 2 clock chips. I2C is just connected to external programming connector for TICS Pro.

Thanks.