SN74AUP1T34: Clock buffer 1.35V

Tool/software:

I have precise clock source 25MHZ with 3.3V amplitude.

I have FPGA design where this clock shall be entered to bank 1.35V.

Clock is entered to PLL inside FPGA, and used for DDR3 IP design. 

I was looking for a clock buffer, but didn't find any working in 1.35V voltage. 

Can I use a simple SN74AUP1T34 buffer / voltage translator  or it will enter jitter errors? 

I am concerned about rise/fall time issues (pretty long according to DS) 

Do you have better proposals ? Thanks