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Original question:

LMKDB1108: LOS# not going low when input clock removed

LMKDB1108: LOS# on LMKDB1108 not going low when input clock removed

Kevin Guy
Prodigy 20 points

Part Number: LMKDB1108

Tool/software:

I am not able to get LOS# to go low when the clock is removed from the input. 

                       1) Are there any register bits that can mask an LOS# event?  

                       2) Is there anything that can disable the LOS# function?  Example -> vPWRGD/PWRDN# low to long after power-up?  etc?

                       3) What voltage thresholds cause LOS# to go low?  Is it a static DC value on the input?  If so, what do the DC values on each leg (+ and -) need to be in order to get the LOS# to go low?   

                       4) Does the LOS# go low when the input clock stops toggling?  If the two inputs are floating near each other when the clock stops, could noise cause the differential input receiver to chatter and not trigger a LOS# event?     

thank you 

Kevin

  • 0
    TI__Genius 12550 points

    Hi Kevin,

    The LOS# functionality should be active by default, so your issue is a bit puzzling.

    I forwarded all of these questions to the designer, and there are a couple of questions I have.

    When do you move the PWRGD_PWRDN# pin high? Do you assert it high before the input clock is active? Do you move it back and forth between high and low at any point?

    Additionally, there is a known issue of the LOS# not going low when AOD is disabled (bit 4 of register 4). Is it possible that you set that low by accident? And how are you interfacing with/programming this device?

    Thanks,

    Michael