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LMX2571-EP: LMX2571EVM -- PLL Configuration and Lock Mismatch

CAREY
Prodigy 100 points
Part Number: LMX2571-EP


Dear Team,

below is the PLL configuration  for 406.025Mhz. using 20Mhz oscillator (Hope 20MHz oscillator is there in Evalauation Board)
image.png

But , it is locking at 349.2833Mhz @ 0.01dBm.

image.png

Let me know need to done.

Thanks 

--
John

 

  • 0
    TI__Guru** 111540 points

    Hi John,

    In the GUI, you put it is integer mode, so the fraction will be ignored. If it is locked, it will lock to 4872MHz. You should set FRAC_ORDER to 2nd, 3rd or 4th order for fractional channel.

    If you were using the EVM and did not modify the loop filter, I am afraid it will not lock even if you use the correct FRAC_ORDER. This is because the loop filter is design to work with 80MHz fpd while your configuration has fpd=0.666MHz. The loop filter is no longer stable at this fpd. 

    If fpd=0.6666MHz is your application requirement, you need to redesign the loop filter. You can use PLL Sim (www.ti.com/.../PLLATINUMSIM-SW) to design the loop filter.