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Optimizing LMK04033 in Clock Design Tool

Other Parts Discussed in Thread: LMK04033, LMK04803


I have a question regarding the LMK04033B. We’re going to be utilizing it to clean up a CPRI reference clock that is recovered from a received serial datastream coming into an FPGA. The clean signal will be fed back into the FPGA for use. CPRI reference frequencies could be 3.84MHz, 7.68 MHz, 15.36 MHz, 30.72 MHz, 61.44 MHz, 122.88 MHz, or 153.6 Mhz. With the LMK04033B, I’ll be utilizing a VCXO on the OSCIN. I downloaded the Clock Design Tool  and  am trying to utilize it to pick the best VCXO frequency as well as the  PLL1 and PLL2 filter recommendations.

  Since the tool really only allows you to enter one possible input, I’m looking for a way to compute the best scenario. Thoughts on how to accomplish this?

Charles

  • Hi Charles,

    For CPRI application, usually we will pick 61.44MHz or 122.88MHz VCXO. Higher VCXO freq can produce better CLKout freq noise.

    BTW, LMK04033 cannot generate 153.6 and 122.88 clocks simutaneously. Pls consider to use LMK04803.