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LMK04002-FREQUENCY LOCKING ERROR

Other Parts Discussed in Thread: LMK04002

Hi,

I am using LMK04002B device in my design for the ADC & DAC sampling clock generation. I had programmed the device to FVCO :1600MHz, CLK IN-0 REF:20MHz FROM OCXO(AOCJY-20.000MHZ-E , HCMOS SINGLE ENDED), OSC IN: 100MHz CVHD-950X-100.000. CLK OUT-0 is designed for the 200MHz(LVPECL), CLK OUT-3 is designed for the 800MHz(LVPECL) ,CLK OUT4 is designed for the 20MHz(LVPECL), CLKOUT-1&2 is designed for the 50MHz(LVCMOS), FOUT is disabled. Circuit is drawn as per the datasheet recommendation.

It seems that inseated of 200MHz we are getting 199.8MHz, the same frequency error is present in the remaining clk out pins. What will be reason behind this frequency error ? at the same time we have changed the FVCO to 1700MHZ still the CLK OUT-0 is 199.8MHz what will be the reason behind this ?

In order to generate 200MHz, & 800MHz from LMK04002 what are all the necessary settings to be taken care ?

Regards,

Rajesh.S