• State
  • Locked Locked
  • Replies 0 replies
  • Subscribers 20 subscribers
  • Views 326 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LVPECL to Input CLK0/CLK1 of CDCLVD110A

Sirichai Kungsakawin
Prodigy 30 points
Other Parts Discussed in Thread: CDCLVD110A

Is it possible to drive CLK0/CLK1 inputs of CDCLVD110A with any other differential technology beside LVDS? If so, what would be the proper termination for driving an LVPECL signals to these differential clock input pins?