CDCM6208 pin mode

MyoungRyun Jo

Other Parts Discussed in Thread: CDCM6208V1

Hello.

I have used CDCM6208V1 & V2 clock buffer in my design.

These chip setting was pin mode.

But output is not setting the value.

V1:

-PRI_REFP/N : 25MHz LVDS

-SEC_REFP/N : NC

-PIN[4:0] : 0x09(10-V1) -> Y0/1: 125 LVDS, Y2/3: 156.25 LVDS, Y4/5: 100 LVDS Y6: 133.33 LVDS Y7: 25 LVDS

-PDN/SYNCn : 4.7k pull up(3.3V)

-SI_MODE[1:0] = 10 (pin mode)

-REF_SEL : 4.7k pull down

-RESETn/PWR : 3.3V

-ELF : 100p/500/22n

-power : all 3.3V

But STATUS0 is LOW. And output Y0 and Y1 is 130MHz. Also Y2 to Y7 is 104MHz.

Please let us know if there is any issues.

Thanks.

0 Alan O over 11 years ago

It sounds like the PLL is not locking.

If you probe ELF using a high-impedance scope probe, what do you observe? It should appear to be a DC voltage near mid-rail of the supply.

What region are you (or your customer) based in? It would help to know this so we can assign your case to the primary Applications support contact.

Regards,
Alan

0 MyoungRyun Jo over 11 years ago in reply to Alan O

Thanks Alan.

But this is my mistake...

V1 and V2 are changed...

After corrected, and now comes the normal output.

Regards,

0 Alan O over 11 years ago in reply to MyoungRyun Jo

Thanks for confirming. Please close this thread by clicking "Verify Answer".

Regards,
Alan

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