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ClockPro and CDCE925

Other Parts Discussed in Thread: CLOCKPRO, CDCE925

What support documentation can you provide to enable the creation of an embedded "home grown" version of an application that works like ClockPro to enable a system to reconfigure the CDCE925 on the fly?  This is for application in a software defined acquisition system.

Information specifically on the following would be very helpful:

-  an explanation of the algorithm for determining the optimal P, Q, R, etc

- any discussion on the optimization strategy used in the ClockPro

  • Hi,

    Please refer to the PLL book ( on how ClockPro optimizes Loop Filter components depending on closed and open loop criteria. The book goes into details about the trade offs and advantages several design techniques used to optimize Loop Filters as well as divider settings.


  • Gabe; Thanks for the link to the pll book. This is interesting, but very academic information, and it doesn't really help generate the CDCE925 parameters specifically. The primary issue I have is that the 925 data sheet (page 21) states that the fout of the device can be calculated by fin/pdiv * N/M. Unfortunately this equation is only true for integer N values, not fractional ones. I'm sure that the P, Q, and R values will affect this calculation, but they seem to be ignored. If N is alternating between 2 values to achieve fractional division, how do we know what those values are, and how/when they are applied? And most importantly, how do we calculate P, Q, R to apply the theory? 


  • Hi Scott,

    I'm working on getting this information for you. Once I have the information you need, I'll follow up with you.



  • Hello Scott,

    the CDCE9xx is a fractional n PLL, but it does not use N internally. N gets translated to Q and R, where R controls the fractional logic.

    if you start with selecting your output frequency you should use this formula: Fout = Fin *N/M. N and M are integer values.

    P,Q,R can be calculated like this:





    The calculation can be found also in the datasheet at the very last pages. E.g    at page 18


    The CDCE9xx family has a fixed loop filter and cannot be changed.


    In order to get the best performance N and M values should be maximized. So, if you have 25MHz input and a 200MHz VCO frequency, you should select N=4088 and M=511 instead of N=8 and M=1.


    N,P,Q,R needs to get written into the registers to get the right configuration. Therefore they need to be always calculated. The PLL will be in fractional mode, if R is not equal to 0.

    best regards,


  • Thanks Julian, this is excellent information. What I need to know now, is once N, P, Q, and R have been calculated and programmed, what will the output frequency be? Clearly, it's not exactly Fin/pDiv * N/M because R will modify things slightly. I need a way to predict the output frequency EXACTLY, based on the values of N, P, Q, and R. Our application needs to be able to program the frequency with very high precision (certainly less than 1ppm error, preferably less than 100ppb). Because of this one of the first things I need to do is verify that the algorithm I've coded to calculate the programming parameters is correct. I do this by passing a target value to the algorithm, then compare the result I get back against the target. If I just use Fout = Fin/pDiv * N/M I routinely get errors above 200ppm, which is unacceptable. Based on the CDCE925 data sheet I expect the precision of the clock to be much higher than this, and I suspect that the problem with my algorithm verification method is that my formula for Fout is integer only, not fractional. In short, why is R not included in the Fout calculation? What is the proper formula to calculate Fout? Thanks again.

  • Hello Scott,

    if you substitute the formulas above in Fout = Fin/pDiv * N/M you will get:

    Fout = Fin/pDiv * N/M = Fin/2^P * (Q+R/M) *1/pDiv


    Frequency error:

    if you experience a frequency error, you may want to check your input signal. e.g.: Input =  typical 25MHz Crystal with +/-30ppm accuracy. If the load caps for the Crystal are not right the Crystal could oscillate at 25MHz + 30ppm. This ppm error will be transferred through the 0ppm PLL to the outputs. This means, that a 25MHz output signal will also have 30ppm offset. Note that the Frequency error scales with frequency. If the VCO operates at 200MHz, the 30ppm Crystal will cause a 240ppm error.

    please try to estimate the frequency error of the input by selecting the PLL bypass mode. You can adjust the crystal loading with the in-build load caps.


    best regards,


  • Hi Julian;

    Are you saying that if I program M, N, P, Q, and R correctly, the only source of error is the reference oscillator? Please understand that at this point this is a simulation exercise which assumes a perfect reference frequency of 100MHz. As I said before, I start with the reference frequency, and my desired VCO frequency. I then calculate the programming parameters. But if I try to work backwards from my resultant values of M, N, etc, I can't seem to accurately achieve the output frequencies I need. (Off by tens or hundreds of ppm) The data sheet seems to imply that generating a frequency with zero ppm error is just a matter of calculating the programming parameters correctly, and choosing a really good reference source. But what about the frequency of the reference oscillator? Do some frequencies give you fewer programming options, and therefore more error?

    best regards, Scott

  • Hello Scott,

    I recommend  to go for a "divide and conquer" approach and create several steps in your calculation. Then if required you can repeat step-by-step until you reach your solution.

    1) Determine a VCO frequency (float/double data type or similar)

    2) Create an integer-based fractional representation for the VCO frequency using the limits of the N, M ranges. At this point you should perform the check on the accuracy of the (VCO) frequency using float/double data type.

    3) On the resulting fractional representation you can run several optimizations.

    3a) Optimize for higher N,M.

    3b) Apply requirements of your application (multiple frequencies coming from same PLL).

    3c) Convert "N,M" to "Q,P,R" representation (and e.g. check if you achieve R=0).

    Best regards,


  • Hi Patrick;

    Thanks for your reply, and an interesting clue (e.g. check if R = 0). This is likely the root of the problem: What if R is NOT zero? This is probably true for most arbitrarily chosen frequencies, but a method of recalculating fVCO for non-zero R is never given in the data sheet. This would close the mental feedback loop and allow proper simulation of the embedded programming algorithm. Does TI have a formula or algorithm for this situation?

    Thanks again, Scott