This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CDCE62005+DAC34H84

Other Parts Discussed in Thread: DAC34H84, CDCE62005

Hello,

I've had a DAC34H84 for some time now, but haven't been able to get anything out of it. I'm trying to use the internal 19.2MHz reference to generate a 250MHz DAC clock. The steps I've followed are this:

  1. Set the input source to 'Manual_SEC-IN'
  2. Set the reference divider to 1.
  3. Set the input divider to 32, feedback divider to 420. This gives me 19.2 * 420 / 32 = 252MHz at the VCO.
  4. Set the DAC divider to 1, giving 252MHz at DAC.
  5. OSTR clock must be DACCLK / 8 / interp. Set the interpolation to 1x, OSTR divider must then be 8. This give me 31.5 MHz at OSTR.
  6. FPGA clock must be DACCLK / 4 / interp. Set the divider to 4, giving 63 MHz at the FPGA. 
  7. Do the same for FPGA clock2.

At this point, I'm not getting anything out. I have the DAC connected to a TSW1400 via LVDS. The FPGA routes the clock directly to an SMA connector for measurement. However, I cannot see my clock at all. Is there a problem in my set up/process? I've attached my configuration.

  • Hello Nicholai,

    the settings you provided in the text file do not match what you described in the text.

    1. Reg1[1:0] sec-ref input divider is tri-stated
    2. Reg3[27:22] are inconsistent, please check Table 9 of the data sheet to match your required signal standard
    3. Reg4[0], reserved needs to be 1
    4. Reg4[27:22] are inconsistent, please check Table 10 of the data sheet to match your required signal standard

    From your description and the DAC EVM user guide I tried to come up with the frequency plan. I saw that the DAC EVM software includes the CDCE62005 configuration as well. Please try to reproduce the settings from the screenshot below and insert it to the DAC EVM software.

    Best regards,

    Patrick

  • Patrick, 

    Thank you for your response. I have been using the DAC348x_GUI_c3p8.v to configure the device. I do not know why my output registers were incorrect, as they were correct in the GUI. However, I did make the necessary changes in the text file. I am having one issue however. You mentioned that register 0x04 has a reserved bit in location 0, and it needs to be a 1. I made made the change in my configuration file here:

    Address Data

    04 E90C0314

    However, if I load this file into the chip using the GUI, and then select 'Read All', I get this back:

    0xE90C0304

    Note, the LSB has flipped back to a zero. Do you know why this might be?

    Also, I have a question about your VCO/PLL setup. You have 19.2Mhz divided by 48, giving 0.4MHz. This is correctly noted on the picture. However, you have 1000MHz divided by 500 giving 0.4MHz, which does not work. Won't this give me a 200MHz output, not a 1000MHz output at the VCO? Using an input divider of /24 and a feedback of /1250 would work if my understanding is correct. I take it I'm missing something here?

    I've uploaded the corrected configuration file, if you would like to look.

  • Hello Nicholai,

    you are correct! I forgot to add the "bypass divider" into the screenshot. It is "5" (Reg6[15:13]).

    Please see the screenshot below. 2000MHz/2/500/5=0.4MHz

    At this point I cannot comment on the software coming with the DAC EVM. I need to check internally first. For your final application I recommend just to stick to the data sheet of the CDCE62005 and you will be fine.

    Best regards,

    Patrick

  • Patrick,

    It appears you have solved my problems. I can now generate a clock. I'm not sure about the reserved bit I mentioned before, but the main issue I think stemmed from me foolishly having the secondary tri-stated, and the software not correctly configuring the interface. I don't think I would have even noticed those registers not being loaded correctly, blindly trusting the GUI. Thank you much for your assistance! Now I just need to get this DAC working!


    Nicholai

  • You're welcome Nicholai!

    Best regards,

    Patrick