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CDCLVDS2101 as a 1:4 DEMUX

Brian Carpenter
Prodigy 20 points


I want to take an 50 MHz LVDS clock input and send it to 4 different outputs.  It looks like this device will handle this capability.   What do I do to the unused input?  Is DC LVDS Termination OK?  This is what I have right now.  Any suggestions or changes needed?

 Thanks

Brian

  • 0
    TI__Genius 10320 points

    Hi Brian,

    It looks like the CDCLVC1204 will be a good fan-out buffer for your application. The input termination scheme looks good assuming a 50 ohm transmission line. Unused inputs (here INP1 and INN1) should be pulled to GND via 1k resistors. Also, it is recommended to tie VAC_REF to GND via a 0.1 uF capacitor.

    Also, be sure to create a robust power-supply decoupling scheme as outline in the DS. Here, you have only shown a 0.1 uF cap from supply to GND; adding an additional 10 uF cap in parallel to help filter low-frequency noise. I would recommend following our suggestions for power supply decoupling in the DS.

    Gabe