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LMX2541SQ3030E Question for TI Support

Mircea Bogdan
Intellectual 370 points

Other Parts Discussed in Thread: ADC07D1520, LMX2581

Hello,

I plan to make a system with several LMX2541SQ3030E PLLs, generating 1,500MHz from the same 100MHz system clock.

(The resulting 1,500 MHz clocks become sampling clocks for ADC07D1520 chips.)

Will all the LMX2541SQ3030E chips be in phase all the time, every time they start?

Thanks,

Mircea

  • 0
    TI__Mastermind 28031 points
    Mircea,
    The answer is no. To generate 1500 MHz, this means that the VCO will be at 3000 MHz and there will be a divide by 2. When you divide by 2, there are two possible phases. If deterministic phase is critical and you are using a divider that is after hte VCO and not in the loop, you need a sync feature, which this part doesn't have. The LMX2581 allows the divider to be put in the loop as well as many of our LMK series products.
    Regards,Dean
  • 0 in reply to Dean Banerjee
    Intellectual 370 points

    Hi Dean,

    Thank you very much for answering.

    So, would you recommend the LMX2581 for providing the sampling clocks to a system with many ADC07D1520 chips?

    Would you recommend a buffer to service 4 ADC07D1520 from one single LMX2581?

    Is there a reference design with the LMX2581 generating 1,500MHz?

    If not, is there any reference design with the LMX2581?

    Thanks,

    Mircea

  • 0 in reply to Mircea Bogdan
    TI__Mastermind 28031 points

    Mircea,

    The LMX2581 has 2 differential outputs, so you could use that.

     

    If you want more outputs from a chip, you also might want to consider one of the LMK products, such as the LMK4800 family or the LMK4828.   These also have a sync feature for determinstic delay.


    Regards,

    Dean

  • 0 in reply to Dean Banerjee
    Intellectual 370 points

    Hi Dean,

    Webench suggests to use LMK04808B, to generate 1,500MHz  LVDS from 100MHz.

    Is there a reference design for the LMK04808B driving LVDS or PECL?

    Thanks,

    Mircea