Hi Team,
I was calculating the clock jitter at the input of ADC, ADS5463-SP. The customer is using an XO with period jitter (1 sigma) of 25 ps rms and 12K to 20M jitter of 0.3ps rms.
They are using the CDCM7005-SP in buffer mode to fan out this clock to other end points also. The CDCM7005-SP adds 0.1 ps rms jitter from its output buffers.
Should we consider the period jitter from the XO as well in the calculation or is it just the RMS sum of 0.1 ps and 0.3 ps?
Can you please explain with reason?
Thanks,
Mahesh
