Changed the eval board to use 24.192MHz clock source.
The NDK (NIHON DEMPA KOGYO) ENC3047C crystal oscillator is with 24.192MHz output frequency.
Frequency accuracy < 500Hz.
Thus channel spacing set to low value.
The attached file illustrates the value programmed.
By comparing the degradation under strong interferer, deduce the phase noise/discrete spur noise level.
This phenomena is the reciprocal mixing (as discussed) due to the discrete spur (<-96dBc) or the vco phase noise (1MHz offset < -148dB/Hz, CX72300 with external VCO is having -142dB/Hz).
For comparison, 2 model is presented for your info (absolute degraded noise figure value).
VCO Frequency 1283.8MHz 1288.4MHz 1295.6MHz
CX72300(EOL part) 2.86 2.97 2.56
TI2582 4.3 4.1 3.15
LXXXXXXX 2.78 3.0 2.6
IXXXXXXX 3.5 3.3 3.23
Please advise if some measure can mitigate/improve the degradation listed above with lower phase noise.