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Genius 5355 points
Other Parts Discussed in Thread: LMX2582

Hi Support,

Changed the eval board to use 24.192MHz clock source.
The NDK (NIHON DEMPA KOGYO) ENC3047C crystal oscillator is with 24.192MHz output frequency.
Frequency accuracy < 500Hz.
Thus channel spacing set to low value.
The attached file illustrates the value programmed.

By comparing the degradation under strong interferer, deduce the phase noise/discrete spur noise level.
This phenomena is the reciprocal mixing (as discussed) due to the discrete spur (<-96dBc) or the vco phase noise (1MHz offset < -148dB/Hz, CX72300 with external VCO is having -142dB/Hz).
For comparison, 2 model is presented for your info (absolute degraded noise figure value).

VCO Frequency 1283.8MHz 1288.4MHz 1295.6MHz

CX72300(EOL part) 2.86 2.97 2.56
TI2582 4.3 4.1 3.15
LXXXXXXX 2.78 3.0 2.6
IXXXXXXX 3.5 3.3 3.23

Please advise if some measure can mitigate/improve the degradation listed above with lower phase noise.



  • Hello,

    thank you for your interest in lmx2582.

    Please find below a few things to look at for for phase noise improvement and spur improvement:

    1) Run the PFD frequency as high as possible to 200 MHz if possible. Your inband flat noise will improve in theory 3 dB each time you double this PFD frequency. The 1/f filker noise will not change to a first order. There is a input doubler (very low noise) on many of our devices. This gives you the ability to improve in band phase noise significantly almost for free. The reason as you know for fractuional PLL is the ability to keep the PFD frequency HIGH while having a FINE frequency tuning and hence get low inband noise.

    2) Adjust you loop filter to get the phase noise profile and spur management for your use case. loop filter BW should be adjusted so PLL phase noise and VCO phase noise interect. You may also consider to adjust this BW for better spur. Our DS engine order is also programmable from 1st to 4th order. I many case case 2nd order is likely better.

    3) there are 4 things that will change the loop bandwdith. Make sure you have good control/understanding over these: N on the feedback, Kphi (charge pump gain in mA), KVCO (VCO gain in MHz/V) and filter values. N will change with frequency, KVCO will chnage depending on the VCO used and tuning area and Kphi is programmable and can be used to maintain the desired loop bandwdith.

    4) Go check our new PLL simulator called PLLatinum Sim on You will be able to simulate and see impact of these setting very quickly.

    Hope this helps,

    Regards, Simon.