Other Parts Discussed in Thread: LMK02000
Hello,
I encountered a strange problem when trying to use LMK02002 device. I wanted to monitor the output of the PD so I configured the LD port as an analog lock detect by writing 0x05 to PLL_MUX field in R14 and observed permanent zero level. So I changed PLL_MUX to see the inputs to the PD. When writing 0x0B I can see divided OscIn signal exactly as expected, but when writing 0x09 that should show me divided FIn signal I can see zero level (this seems to be consistent with the behavior of the analog lock detect - divided FIn signal is not entering the PD input). But in the same time I can see the signal from FIn port divided by the value programmed in CLKout_DIV divider at any of output ports, that means for me that the FIn signal is "recognized and processed" by the device...
I tried to change the FIn frequency (my nominal value is about 200MHz) and the power level (0 to +10dBm) with no results - I can see signal at the output port, but there is nothing at the PD input.
Has anyone encountered such behavior or know what is wrong? I am using LMK02000 chip in similar application and there everyfing works perfect.
Thanks in advance for a reply - Lukasz