Hello E2E,
I have a customer that passed along the following:
The CDCE706 PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER has a minimum crystal input frequency of 8 MHz according to the datasheet.
Do you know why this is?
We have implemented this device in our design using a 1 MHz crystal and it works fine allowing us to generate a clock output down to 15.4 Hz which is needed in our application.
Is there a reason why we should not operate the chip in this fashion even though it works fine?
