About the clock generation for high speed DAC2900

Yatao,
If you are generating clock on board you might consider something like the CDCE813-Q1 for a high precision source to clock the data and the DAC. This might not be optimal for your design, let us know if you have additional requirements.
Regards,
Brian

hi, Brian
I intend to use CPLD to diliever data to DAC2900 and I need to change the digits sometimes. Using CDCE813-Q1 is too complex for me and I wonder if CPLD's IO pin can generate 125MHz clock signals for DAC2900?

Regards

Yatao,
If the CPLD supports the clock signal output at CMOS levels then I don't see any issue. It might not have the best performance compared to a dedicated PLL (noise, etc)
Regards,
Brian

Thx.
1. You mean, CPLD can be used to output 125MHz clcok for DAC2900?
2. BTW, I wonder if I lower clock frequency to 100MHz, will DA's conversion speed be affected?

3. Are there tips when measuring such high frequency clock signal on PCB board by an oscilloscope? 

Regards

Yatao,
I cannot speak to the capabilities of your CPLD, but if it is able to provide a 100 or 125MHz clock with CMOS signal level then our device will work with it. If the clock has high jitter, etc then the device performance will have some impact.

The conversion rate is based on internal settling of the converter so using a lower DAC clock rate will not change it.

I think you are asking how to measure the clock signal, my suggestion would be to use a high impedance probe with a very short ground lead. Your scope bandwidth should be at least 5x the bandwidth of the signal to make any sense of it (eg 500MHz bandwidth scope).

Regards,
Brian

Hi, Brian.
Thx.
I'll first try my CPLD as the clock source. If it doesn't work, I'll turn to your suggested specific clock source chip.
My last problem, "a high impedance probe with a very short ground lead", the short groud lead means that the probe's ground terminal should be very close to the PCB digital ground's test point?

Regards