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LMK61E07: I2C communication interfered with clock output

Part Number: LMK61E07
Other Parts Discussed in Thread: LMK61E2EVM, LMK61E2

Hi there,

I've noticed that the phase noise of the LMK61E07 is not as good as it was when I2C operations taken place.

I've tried periodically sending commands to change the LMK61E07 frequency or sending command just to read the product ID, or sending non-I2C PRN data to the I2C ports on the chip.

All the above three significantly worsen the phase noise of the LMK61E07 at the sideband related to the I2C port's communication.

Please see the following figure attached.

Thanks.

Regards,

Wade

  • Hi Weida,
    Can you share your LMK61E07 schematic with power supply ? Just want to check if there are other causes.
    I can expect there is some spurs related with I2C clock, but do not expect there is such worse phase noise degraded.

    Regards,
    Shawn
  • Hi, please check the attachment for what we've seen in our EVM when we do continuous write on I2C bus. As Shawn recommends, please share the schematics for us to review. Thanks a lot.

    LMK61xx I2Cwrite phase noise.pptx

  • Thanks both!

    I've been using silicon labs evaluation board, Si5xxUC-EVB.

    www.silabs.com/.../ug298-si5xxuc-evb-ug.pdf

    The microcontroller has been disabled.

    Three wires, SDA, SCL and GND are connected from Xilinx KC705.

    Is that just because the evm is from a wrong company...?

    There doesn't seem to have significant defects and I've added quite a few decouple caps as well.

    Thanks a lot.

  • Even without I2C active, the phase noise doesn't look as clean as what we measure. Did you do hand solder on the Si Labs board? Did the reflow profile follow what's given in JEDEC-STD-020?
  • We didn't use reflow. It was hand soldered.

    Do you mean this may due to mechanical stretching/tension?

    We can certainly buy another eval board and chip to do a proper reflow if the soldering is likely the cause to the fault.

    Thanks for your feedback!

    Regards,

    Weida

  • I suspect this could be due to mechanical tension from the solder profile exceeding recommended reflow temperatures. Please do try machine solder with right profile and let us know the results.

  • Thank you for your insight! We will try it and post the result here.
    Regards
  • Hi guys,

    We have bought the LMK61E2EVM and tested it.

    It appears the default frequency is as the datasheet specified, however, when set to a different frequency (125MHz is the frequency we wanted to use it) the performance is much worse.

    Please see the attached figure.

    I tried to alter the internal PLL setting, however, the Ko (VCO gain) seems not mentioned anywhere.

    Also, I found that when the EVM is powered with ext 5V, and let the on board LDO reg to provide the 3.3V, the noise is much worse than using an external 3.3V to power the chip directly.

    Any suggestions?

    Thanks.

    Regards,

    Weida

  • Is this issue still open? If so, can you please share your LMK61E2 programming config file (.tcs) that you used for your testing? Looking at the yellow trace, it appears the registers settings may not have been correctly programmed.

    In the LMK61E2 programming tool, did you enter 125 (MHz), select "LVPECL" output type, click "Generate Configuration", write all registers, then measure the output clock phase noise (preferably using a balun for differential-to-single-ended conversion).

    Alan
  • Please find the updated result attached. I've tried to upload the TCS file, however the website avoids me from doing so. The registers values are provided following.

    R0 0x0010
    R1 0x010B
    R2 0x0233
    R8 0x08B0
    R9 0x0901
    R16 0x1000
    R17 0x1180
    R21 0x1502
    R22 0x1600
    R23 0x172A
    R25 0x1900
    R26 0x1A34
    R27 0x1B20
    R28 0x1C00
    R29 0x1D01
    R30 0x1E3F
    R31 0x1FFF
    R32 0x20FF
    R33 0x2103
    R34 0x2224
    R35 0x2327
    R36 0x2424
    R37 0x2502
    R38 0x2600
    R39 0x2707
    R47 0x2F00
    R48 0x3000
    R49 0x3110
    R50 0x3200
    R51 0x3300
    R52 0x3400
    R53 0x3500
    R56 0x3800
    R72 0x4802

  • Based on your config above, it looks like...
    You are using LVDS instead of LVPECL, and the PLL settings are what I produced with the LMK61E2 GUI.  Particularly using a different VCO frequency, fractional mode, and 1.6 mA instead of 6.4 mA.

    Please try this configuration attached, registers for reference:

    R0    0x0010
    R1    0x010B
    R2    0x0233
    R8    0x08B0
    R9    0x0901
    R16    0x1000
    R17    0x1180
    R21    0x1501
    R22    0x1600
    R23    0x1728
    R25    0x1900
    R26    0x1A32
    R27    0x1B00
    R28    0x1C00
    R29    0x1D00
    R30    0x1E00
    R31    0x1F00
    R32    0x2001
    R33    0x210C
    R34    0x2228
    R35    0x2303
    R36    0x2408
    R37    0x2500
    R38    0x2600
    R39    0x2700
    R47    0x2F00
    R48    0x3000
    R49    0x3110
    R50    0x3200
    R51    0x3300
    R52    0x3400
    R53    0x3500
    R56    0x3800
    R72    0x4802

    LMK61E2_125.tcs