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THS788: With multiple TDCs do I need one clock and a clock buffer?

Part Number: THS788
Other Parts Discussed in Thread: LMK62A2-200M, LMK00306, THS789

Hello,

I'm using the THS788 in a design - I know TI does not recommend it, but we need the performance.  This part requires a 200Mhz low jitter clock input.  I've found a clock that sounds good from PN: ASFLMX-200.000MHz-5ABB.  I will have 5 of the THS788's on a single PCB. 

Questions

1. Should I use a single clock with a fan out buffer or should the parts have their own clocks?  Does it matter?

2. For an LVDS clock I know you need a 100R parallel termination at the receiver (the THS788), but should any series impedance be added?  For safety?  This depends on link length?

4x of these devices will be timing data from a 16 channel detector.  The fifth one will be doing it's own thing.