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LMK00306: Capacitive coupling question

Part Number: LMK00306
Other Parts Discussed in Thread: LMK62A2-200M,

I have a general question regarding ac coupling your clock chips and clock buffer ICs.  Using this part number for example (LMK62A2-200M to drive this part).

1. When should you ac couple clock signals other than when you need to change the DC offset to interface to different signal standards?

2. I noticed your EVM for this part has all cap coupled inputs and outputs.  Is there a performance benefit or signal integrity benefit to to this?  

3. How do you calculate the correct series capacitance for these cap coupled inputs and outputs?

4. The data sheet for the LMK00306 shows both DC and AC coupled LVDS outputs...If you are driving LVDS inputs (so the signal chain is LVDS and there is no level shift) what are the pros and cons of dc vs ac coupling?

  • 1. This is the main reason one would use AC-coupling.

    2. The EVM inputs and outputs are probably AC-coupled for ease of evaluation. There should be a negligible impact to signal integrity.

    3. You can calculate the capacitance based on the frequency using |X| = 1/(2*pi*f*C).
    For example, for a 100MHz output I would select a 0.1uF capacitor. This results in an impedance of 16 milli-ohms, which is effectively an AC_short.

    4. The benefit of AC-coupling is that you can set the common mode voltage with the receiver or another external bias. The benefit of DC-coupling is that you can directly interface the output with a LVDS receiver without a termination network, which will offer cost savings and free up some PCB area.

    Kind regards,
    Lane