This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CDCM7005-SP: clocking for TCLK2711-SP

Part Number: CDCM7005-SP
Other Parts Discussed in Thread: TLK2711-SP, CDCM7005,


i would like to use CDCM7005 to generate the clock for TLK2711-SP.

1. If i use CDCM7005-SP in the distribution mode, will it meet TLK2711-sp's requirement of 40ps pk-pk jitter?

2. For the distribution mode, can i connect a LVPECL XO directly to VCXO_INP/N?

Thank you.

  • KGY,

    I can help answer your questions.

    1) The CDCM7005 will have an additive jitter component.  This additive jitter is relatively small, so it really will depend on the jitter from the source.

    There is a table of additive jitter calculations in the following application note :   (This is located in the technical docs tab in the CDCM7005-SP product folder)

    At 122.88Mhz, the additive pk-pk jitter for the CDCM7005 (10kHz to 20MHz) was calculated to be 996fS, so just under 1pS.

    If the combination of your LVPECL clock source and the 1ps of additive jitter is less than 40ps, then you will meet the input requirements for the TLK2711.

    2) Yes.  See this e2e post for more information:

    If this answers your question, please click "Verify it as the answer"