I have generated clock frequencies of 10.045Mhz and 123.2MHz using TI EVK:CDCE913PERF-EVM and clock pro software ,
Few issues we have observed which we are listed below:
1) Frequency offset observed with respect to programmed frequency .
2) Also we have observed side bands (unwanted side bands at offset frequencies w.r.t programmed carrier frequency ) during signal generation.
You can refer the attachment for more details (PLL Test.zip )
Thanks and regards