Other Parts Discussed in Thread: ADC12DJ3200, TIDA-01028
We will be using LMK04828 for generating Sysref clocks for ADC12DJ3200 and for generating GBTCLK,Sysref clock and Referenc clock for virtex-7 FPGA.
Now ADC12DJ3200 sysref clock standard is LVPECL so I will be using 120 Ohm pull down resistor on both P and N outputs of LMK04828.
But FPGA clocks (GBTCLK,SYSREF and REFCLK) will be using LVDS standard.
So which configuration should we use for LVDS outputs from LMK04828 from the below schematic:
Also , we have seen the schematic of TIDA-01028 in which two ADC12DJ2300 are used.
In this schematic, LMK04828 outputs used for FPGA clocks use 240 pull down resistor as termination. We are assuming TIDA-01028, also generate LVDS outputs from LMK04828 for FPGA.
So can LMK04828 generate LVDS outputs, even though outputs are terminated with 120 or 240 Ohm pull down resistors instead of shunt 560 or 100 Ohm resistors.
An early response will be highly appreciated.