Our system provides an AC coupled LVDS clock into another module CDCLVD1216 clock input. We have recently discovered that the module expects a DC coupled input (the VREF on the third party CDCLVD1216 is not connected; the differential input only has 100 ohm termination between the signals). For the combined system, this means the CDCLVD1216 input has no DC bias. Per the CDCLVD1216 datasheet, VICM is specified as minimum 1V.
With no DC bias being provided and a minimum requirement VICM of 1V, we would expect the CDCLVD1216 to not work (no clock outputs). This is not what’s happening. The CDCLVD1216 outputs are operating correctly (verified functionally in system and electrically on lab bench). Can you help me understand why this is working?
Your advise would be so appreciated.