Hello,
My customer built a board with CDCLVC1104 and they are evaluating it now.
Then they found the slew rate of the input signal to CLKIN pin was around 4.7V/ns which is NOT within the datasheet recommendation in the below figure.
It is a little bit faster than datasheet recommendation.
I can understand lower slew rate could cause something problem, but what kind of problem could occur for higher slew rate?
Because of their tight development schedule, they don’t want to modify the board. So could you give us some comments for this spec violation?
Regards,
Oba