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LMK05028EVM: In case of LVCMOS input

Part Number: LMK05028EVM
Other Parts Discussed in Thread: LMK05028

Hi all

Would you mind if we ask LMK05028?

In case of LVCMOS input at INPX, there is the description as follow;

Does INX_N require pull down with external 10kohm?
We assume that there is no register setting for the internal pull down at INX_N?Is our recognition correct?

And then, there is the description on the datasheet as follow;
"LVCMOS input mode is recommended for input frequencies from 5 MHz down to 1 Hz (1 PPS or pulse-per-second)."
Should LVCMOS input frequency range be from 1 Hz to 5MHz?

Kind regards,

Hirotaka Matsumoto

  • Hi team

    If you have some update, could you let us know?

    Kind regards,

    Hirotaka Matsumoto

  • Hello,

    The LVCMOS input configuration can work at higher than 5 MHz, however for lower frequencies < 5 we recommend this over the LVDS or LVPECL options. details on the input. You can find more details on the input buffer structure and settings in the datasheet figure 26 and table 5. For this mode the INx this can be DC coupled or externally biased.

    Example schematics are provided in figure 67 application  section reference schematic

    For the XIN please note however, there should be voltage divider for the proper levels.