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LMX2572LP: LMX2572LP maximum frequency jump interval, and calibration timing specs

Part Number: LMX2572LP
Other Parts Discussed in Thread: LMX2572

Hi,

The LMX2572LP is being considered for a PLL in a communication system for ISM applications.

A recent look at the system proposed for the LMX2572LP has underlined a requirement for us to establish the maximum frequency jumps possible with the absolute maximum delay for doing this.

On page 11 of the datasheet the calibration timing specified appears to have a maximum typical value of about 60us (figure 15 in the datasheet) and about 100us from Figure 16, for the low-high and high-low jumps respectively. If these are typical values, where can I find the absolute maximum values for these parameters, across the full temperature range ?? I need to know what this timing is bounded to.

Similarly, we'd like to know what the maximum delay for completing a jump from the very lowest frequency possible to the highest possible (and vice versa whichever is longest). This may not necessarily be the lowest to highest, but simply wanting to set some upper bounds on what is a maximum delay for a jump from one frequency to another with stable frequency settling. For instance, in FHSS systems this is an important factor to know and consider and to have a known upper bound to it. Are there any graphs or maximum constraints specified in the datasheet regarding this like for the VCO calibration time ?

Thanks in advance and regards,

M

  • Hi there,

    The total frequency switching time of a synthesizer is equal to (1)Register programming time + (2)VCO calibration time + (3)PLL analog lock time. As a result, we could only put a typical value at a particular configuration in the datasheet.

    Without assist, the VCO calibration time is approx. 100µs, but this depends on the state machine clock as well. We can significantly reduce the calibration time with full-assist. Please read the following appnote on calibration.

    Please also use PLL Sim to design the loop filter and do an estimation on lock time. 

  • Hi Noel,

    Yes the app note is useful even though it does not mention the LMX2572 per se. I presume its part of the same synthesizer family ... Generally the SPI delay should be minimal as we have the SPI clock > 5 MHz. I will look at the PLL Sim for the Loop Filter.

    With regards to the Loop Filter, will the eventual design of it cover a frequency range jump from the 860-870 MHz band to the 1720-1740 MHz band ? I have to set two LO frequencies dynamically of which one is Fc ± IF, the Fcarrier ± IF for Reception, and then 2xFc for Transmission purposes (due to the voltage divider constraints of the different Tx and Rx chipsets we employ).

    Would one Loop Filter design suffice to cover this entire frequency range that spans about an octave (IF being < 50MHz in this case) ?

     

    Also, register R0 has one bit named OUT_MUTE for muting both LMX2572LP buffers. I did not see any other means to mute the buffers independently. There is register R44 that allows 2bits for powering-up-down the RF outputs independently. Can this be used to "mute" the RF outputs instantaneously and independently or will powering up introduce a delay, to be used as independent "mutes" for A and B ?? Essentially what is the difference between the "mute" function and the independent power-up-down output function other than OUT_MUTE consuming relatively more power when active, but being "faster" ??

    Regards,

    M

  • Hi there,

    You could only have one loop filter in the board, because VCO gain varies between VCO cores (see datasheet Table 134), so the loop bandwidth will be slightly different across the whole frequency coverage of the chip. As long as the loop filter has sufficient phase margin, it will work for all frequencies. 

    when OUT_MUTE = 1, the output buffer will be automatically muted during VCO calibration, after calibration, the output will be unmuted.

    R44 is used to manually power down the output buffers. Datasheet section 8.1.5.2 has the ON/OFF response time of the buffer.

  • Hi Noel,

    OK great so R44 will do what we want with a power-up response time of < 20 us should be fine for our application.

    Thanks for your clarification.

    Regards, M