• State
  • Locked Locked
  • Replies 4 replies
  • Subscribers 21 subscribers
  • Views 242 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CDCM6208V2G: Phase delay between two clock chips on different boards

Ramu Seva
Prodigy 100 points
Part Number: CDCM6208V2G
Other Parts Discussed in Thread: CDCM6208

Hi All,

We have two boards on which we use the CDCM6208V2 chips. We program the clock chips to have the same frequency on both the boards and provide the syncn signal to both the chips at the same time.

We expected to see a worst case phase delay of 2 * times the 1/PS_A/B, but we realized that the phase delay is changing every time we program the clock chip. We see delays in the range of 8 ns to 1.6 ns for a output clock of 50,125,100 and 200 MHz on Y3 channel.

The Y3 clock output is directly connected to the SMA connectors with a 0 ohm and CAP between the clock chip and the SMA. Below is the screen shot of the schematic.

Thanks,

 Ramu

  • 0
    Prodigy 100 points

    Sorry the screen shot did not attach properly in the above post

  • 0 in reply to Ramu Seva
    TI__Mastermind 18070 points

    Hi Ramu,

    I'm assuming that the lowest prescaler frequency you use is 3000/5 = 600MHz, which translates to a max of 2 * 1/600e6 = 3.33ns propagation variation.

    You mentioned that the max phase difference observed was 8ns, can you be more specific about the setting? Or does the phase delay varies with each programming cycle even if the configuration is the same? When the phase delay at the output is 8ns, can you also measure the phase difference between the sync pulses that arrive at SYNCN pins of CDCM6208 just to make sure?

    Regards,
    Hao

  • 0 in reply to Hao Z
    Prodigy 10 points

    Hi Hao, 

    Yes we see phase delay varying with each programming cycle even if the configuration is same. The sync signal between the 2 clock chip is triggered at the same time and we see phase difference of max 400 to 800ps. 

  • 0 in reply to Ritin Nambiar
    TI__Mastermind 18070 points

    Hi Ritin,

    How many outputs are you using for each device? Can you check if the outputs of the same device are exactly aligned? This is to check if the SYNC signal is functioning properly.

    Also try measuring the time relationship between SYNC pulse at the SYNC pin and the first clock edge at the output, compare that against the datasheet specs and see if it's close to the range of 9/PSA - 11/PSA for both devices.

    Regards,
    Hao