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CDCEL913: Load Capacitance

Sean Heffernan1
Intellectual 260 points
Part Number: CDCEL913
Other Parts Discussed in Thread: ADC3660,

I’m using a 12 MHz crystal oscillator and a CDCE(L)913 clock generator chip to drive the clock signals into an ADC3660. The CDCE(L)913 datasheet mentions an on-chip programmable load capacitance (default value of 10pF), and it says that external capacitors should ONLY be used for very fine adjustments; in my current design (and in past designs that used this clock generator chip), we have used two external 18pF capacitors, but I'm not sure if this is adversely impacting the output clock signals.

 

Application Report SCAA085 defines load capacitance as the on-chip programmable capacitance plus stray capacitance (plus, I assume, the external capacitors that I'm using). The crystal I am using has a specified load capacitance of 18pF.

  

The CDCE(L)913 datasheet also says that the device has an input capacitance of 1.5pF that must be added to the programmed load capacitance, and the two external capacitors should have an equivalent capacitance of 9pF; if I’m doing the math correctly, I believe that means that we should actually program the on-chip load capacitance to 7pf (rounded down from 7.5pF):

 

On-chip capacitance = 18pF – 1.5pF – 9pF = 7.5pF

 

Do you think that using the default value of 10pF instead of the “correct” value of 7.5pF will have any noticeable effect on the clock generator outputs? If such a small difference DOES have an effect, would it be better if I remove the external capacitors and program the on-chip capacitance to 16pF?

  • 0
    TI__Genius 9920 points

    1，CDCEL913 has the on-chip programmable crystal load range 0 pF to 20 pF with step 1pF.

    2,  Crystal with 18 pF load capacitance can use CDCEL913 on-chip load capacitor directly.

    3, On-chip CL capacitance without external load capacitors: 18pF(Crystal load requirement) - 6pF & 2pF in series(The device input capacitance value) - PCB stray capacitance (2~3pF) = 13.5 ~ 14.5 pF, so select 14pF on-chip as the start test

    4, On-chip CL capacitance with external load capacitors(CLext1， CLext2): a rough calculation is to subtract CLext1 & CLext2 in series. 14pF - 9pF = 5 pF

    5, Depends on different  PCB stray capacitance， program an tune on-chip load capacitor is allowed.

    6, When CL still can make the Crystal Oscillator work, different CL can impact output frequency accuracy. Refer to https://www.ti.com/lit/an/scaa085a/scaa085a.pdf for Frequency offset ppm estimation. Most of application only need an operation clock, do not care about the small frequency ppm offset.

    7, For accurate calculation, on-chip CL is composed by CL1 and CL2.  We can suppose CL1= CL2 = 2* Programmed load capacitance.

    So CL1, CLext1 and Cxin(6pF) are located at one side of XTAL, CL2, CLext2, Cout(2pF) are located at another side of XTAL.

    Add CL1+CLext1+Cxin = CL_left,

    Add CL2+CLext2+Cout = CL_right

    CL_left and CL_right are in series.

    Then add Cs

    That's total Cload for the crystal.

    But no necessary to calculate it so accurately.

    On your real board, if really concern the frequency accuracy, fine tuning still is needed after our initial calculation.

    Good luck.