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TLC555: Can I get Vol and Voh for specific condition?

Hung Ching Hsu
Expert 3086 points
Part Number: TLC555
Other Parts Discussed in Thread: TINA-TI

Hi Team

My customer is asking what the value of Vol and Voh will be with the condition below.

Is it able to get the value? 

Vol when

1. Vdd=12V Isink=50mA

2. Vdd=12V Isink=10mA

Voh when

1. Vdd=15V Isource=50mA

2. Vdd=12V Isource=10mA

3. Vdd=12V Isource=1mA

Thanks.

  • 0
    TI__Mastermind 42273 points

    Hello,

    The TLC555 cannot source more than 15mA (see the Absolute Max Ratings on page 6). Page 10 of the datasheet gives the data you are looking for when the device is operated at 15V. We don't have specified data for this at 12V. Using the TLC555 model in TINA TI, I've simulated that 

    Vol:

    1. Vdd=12V Isink=50mA, Vol= 604mV

    2. Vdd=12V Isink=10mA, Vol= 126mV

    Voh:

    2. Vdd=12V Isource=10mA, Voh= 11.45V

    3. Vdd=12V Isource=1mA, Voh= 11.95V

    I could attempt to make these measurements for you on a chip I have in my lab if you would like, but this would just be to give you a general idea of the values, as it is not something that is specified in the datasheet. 

    Best,

    Katlynne Jones

  • 0 in reply to Katlynne Jones
    TI__Expert 3086 points

    Hi Katlynne 

    Thanks for the reply. 

    I'm confirming with customer if he needs data from a real chip. 

    I got other 2 questions. Could you help with these also? thanks.

    1.  the customer is trying to use TLC555 in monostable operation. 

    The customer knows tw can be calculated by 1.1*Ra*C in monostable operation,

    and he wants to know if TLC555 will work normally if Vdd=13.4V、Ra=33kΩ、C=100uF is applied. 

    And what is the max. value of C could be used? 

    He is worrying about the electric charge stored in C may cause TLC555 broken.

    2. Will TLC555 works normally when connecting 0.01uF capacitor between TRIG pin and GND, and then apply 9.3V to TRIG pin? 

    And what is the max. value of C could be used? 

    As i looked up in the datasheet, the value seems have to be between 1.8pF(VDD=15V) and 2.1pF(VDD=5V).

    It will be appreciate if you could tell me the exact value. 

    Thanks.

  • 0 in reply to Hung Ching Hsu
    TI__Expert 3086 points

    Hi Katlynne 

    The customer said simulation result from TINA-TI is fine for him. 

    Can you kindly also help above questions? Thanks.

    And I am curious about how to simulate Vol and Voh in TINA-TI, so if possible, can you share the TINA-TI file you used ? 

    Thanks.

  • 0 in reply to Hung Ching Hsu
    TI__Mastermind 42273 points

    Hello,

    1. There is no maximum capacitor value. A 100uF capacitor will work, but you need to pay attention to the accuracy of your capacitor as the size gets larger. If possible I would recommend using a larger resistor and smaller capacitor in this case. Larger capacitors usually have wider tolerances and larger leakage, which will end up changing the timing of the circuit.

    2. Any capacitor is OK to add to the Trig pin. The datasheet parameter is telling you how much input capacitance already exists on that pin. In addition, any voltage between GND and VDD is OK to apply to the input pins. However, you need to apply a voltage lower than 1/3 supply to trigger the timer. The Trig pin is an active low input, so 9.3V would not trigger the timer.  

    I'm attaching the TINA-TI sim that I used to calculate the Voh and Vol. I need to correct the Vol values I told you earlier as I forgot to rotate my current source to sink the current rather than source. I also modified it to match the circuit configuration that you provided.TLC555_Voh_Vol_12V_mono.TSC

    1. Vdd=12V Isink=50mA, Vol= 651mV

    2. Vdd=12V Isink=10mA, Vol= 127mV

    Unfortunately TINA-TI will not always give you an error if you try to simulate something outside of the datasheet parameters, so keep that in mind when simulating.  

    Best,

    Katlynne Jones

  • 0 in reply to Katlynne Jones
    TI__Expert 3086 points

    Hi Katlynne 

    Thanks for your reply. 

    My customer have something to clarify. 

    1. We understood that if we can tolerate the changing of timing then there is no max. value for C. 

    So it is okay to understand it is okay to use TLC555 with Vdd=13.4V、Ra=33kΩ、C=100uF condition? 

    And the customer is wondering if TLC555 has any internal function to avoid latch-up, so TLC555 won't be broken whatever how large C is ?

    Here's his thought. 

    Right after Vdd is off, input voltage of TLC555 may be larger than Vdd because the electric charge stored in C, then it may cause latch-up. 

    2. We also understood there is no max. value of C between Trig pin and GND. 

    But is there a possibility that latch-up cause TLC555 broken when connecting 0.01uF capacitor between TRIG pin and GND, and then apply 9.3V to TRIG pin?

    Thanks again for the Vol and Vol data and also TINA-TI file.

  • 0 in reply to Hung Ching Hsu
    TI__Mastermind 42273 points

    Hello,

    I have not seen any latch-up issues due to capacitors being too large. I am double checking with another engineer on your question and I will get back to you tomorrow. 

    Best,

    Katlynne Jones

  • 0 in reply to Hung Ching Hsu
    TI__Mastermind 42273 points

    Hello,

    In the case of the 100uF capacitor, when Vdd is turned off, the energy in the capacitor will dissipate through the other pins and RA. If the part goes into latch-up when the power goes off, the part will be OK as long as power is not reapplied before the capacitor is discharged. 9.3V is OK to apply to the Trig pin with a supply of 13.4V. If you are concerned about latch-up on the Trig pin when powering down, you can add a series resistance to limit the current.

    Best,

    Katlynne Jones

  • 0 in reply to Katlynne Jones
    TI__Expert 3086 points

    Hi Katlynne 

    My customer have further question about TLC555. 

    Could you kindly help with this? Thanks. 

    He understood that it won't be a problem even though latch-up occurs once the capacitor is discharged before power on again. 

    1. How about the current flow through output transistor on discharge pin when applying Vdd=13.4V、Ra=33kΩ、C=100uF, is there no worry the current make the transistor broken?

    2. How about the max. value of capacitor can put on discharge pin ? Is it also not limited?

    Thanks.

  • 0 in reply to Hung Ching Hsu
    TI__Mastermind 42273 points

    Hi,

    To your first question, you can refer to this post for more details. But in short, the discharge "pin 7 internal transistor as well as the PNP transistor are large structures and can easily absorb the energy of the capacitor." 

    To your second question, in monostable mode the timing capacitor is already connected directly to the discharge pin and ground. Adding extra capacitance to the discharge pin is going to change the timing of circuit. There would be no limit, similar to the timing capacitor. 

    Best,

    Katlynne Jones