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CCS/TPL5010: First wake after Reset

Part Number: TPL5010

Tool/software: Code Composer Studio

In my use case, the TPL5010 is used in a pulse length detection circuit. The TPL5010 is permanently powered and  does not receive any done pulse most of the time. It therefore always resets the RST output after a missed wake period. Further, the RST output is only pulled high if the pulse length detection circuit should be used. I seems to be not clear what happens after permanently resetting the TPL5010.

I am using the following steps with a 200 ms wake period:

1. Power is active and RST line is kept low for a few seconds

2. pulling the RST line to 2,2V and wait for the next rising edge on the RST line.

3. Issue a valid done signal

This results in an unclear situation. Even if the done pulse is clearly issued, the TPL5010 immediately goes into the next reset after a rising edge on the RST output. However, this only happens once in like 20 cases.

Are there any additional timing requirements after coming from the reset state or are there hardware requirements for the RST output (is it valid to keep the output low during most of the time)?

Additionally I have noticed a very strong variation in the wake pulse length from 10 to 40ms. Is this an expected variation?

Thank you in advance for your help.

  • Can you share the schematic and any measurements you have taken? It isn't clear how this situation is occurring.

    When in this situation, what is the time interval measured between the RSTn pules?

    RSTn is connected low most of the time in your application, correct? Can you try connecting a DC rail and seeing if the issue persists?

    Kind regards,
    Lane Boyd