I would like to cycle VDD/VDDout pin when they drops below recommended range to reset internal registers.
1. Could you advise the minimum recommended turn off time and minimum voltage for properly achieve reset?
( for example VDD<0.5V, for at least 10ms)
2. Is there a ripple noise requirement on VDD/VDDout pin?
3. Is there a requirement for rise/fall slew rate for VDD/VDDout pin?