<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://e2e.ti.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Clock &amp; timing</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/</link><description> Products covered in this section are Clock Generation &amp;amp; Distribution, Memory Interface, Registers, Real Time Clocks and Timers. </description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><item><title>Forum Post: RE: TLC555: Component value setting</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1645060/tlc555-component-value-setting/6344354</link><pubDate>Wed, 13 May 2026 21:08:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:10b60689-bec3-4fad-ac6c-fdcad0afc56b</guid><dc:creator>Ron Michallick</dc:creator><description>Eileen, The full FAQ is here: [FAQ] How do I design a-stable timer, oscillator, circuits using LMC555, TLC555, LM555, NA555, NE555, SA555, or SE555? Frequency is inverse to resistors. They could factor the resistors by 500/400 = 1.25 the previous value RA 12.5k (12.4k) , Rb = 166.25k (165k), Rd = 376 (374 ohms)</description></item><item><title>Forum Post: RE: TLC555: Component value setting</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1645060/tlc555-component-value-setting/6344089</link><pubDate>Wed, 13 May 2026 17:43:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:28acc122-78a5-4685-84b5-28e62a9b29b6</guid><dc:creator>Ron Michallick</dc:creator><description>Eileen, I have no requirements for precision. The main point of the table was to convey the point that output is about 500Hz and 50% 1% resistors are fine. RB being 0.1% in table is point out that it is the most important resistor (of the three). The 5% for cap is to point that the capacitor is the main cause of output variance. It&amp;#39;s tolerance, voltage and temperature modulations.</description></item><item><title>Forum Post: RE: LMX2595EVM: USB2ANY firmware update failure</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1644742/lmx2595evm-usb2any-firmware-update-failure/6344064</link><pubDate>Wed, 13 May 2026 17:26:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:1d5131db-58c8-4584-999b-046d06b88294</guid><dc:creator>Noel Fung</dc:creator><description>Hi There, 2.7.0.0 is more than a decade old, it is not supported by TICS Pro. Could you try below? 1. Download USB2ANY Firmware Loader ( https://dr-download.ti.com/software-development/firmware/MD-063xo7KvuK/01.00.00.00/snvc166.zip ), unzip the .exe file to a folder. 2. Copy USB2ANY.dll from C:\Program Files (x86)\Texas Instruments\TICS Pro to the same folder of firmware loader. For example: 3. Save below text file to c:\Program Files (x86)\TI USB2ANY SDK\Firmware. e2e.ti.com/.../6560.USB2ANY_5F00_2_5F00_9_5F00_1_5F00_2.txt 4. Connect Reference Pro board to the PC via USB cable 5. Run USB2ANY Firmware Loader.exe 6. Click Yes 7. Click Cancel 8. Click Update Firmware . Make sure the correct text file is shown in &amp;quot;Update to firmware&amp;quot; pull down menu. 9. Click Yes 10. Follow the onscreen instruction to complete the update. I hope this works.</description></item><item><title>Forum Post: RE: TLC555: Component value setting</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1645060/tlc555-component-value-setting/6343737</link><pubDate>Wed, 13 May 2026 14:43:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:add7ac28-e62c-48fb-8415-99847605ad2c</guid><dc:creator>Eileen Hu</dc:creator><description>Hi Ron, What the precision requirements for the components? Are they listed in the first column of the table? If so, 0.1% tolerance resistors are not available in the customer&amp;#39;s component library. Can they replace RB with 1% tolerance one? Regards, Eileen</description></item><item><title>Forum Post: CDCE6214: Clock problem</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1645537/cdce6214-clock-problem</link><pubDate>Wed, 13 May 2026 14:13:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:d75eebbf-90a8-437b-bbaa-faad05fd762c</guid><dc:creator>Danilo A.</dc:creator><description>Part Number: CDCE6214 Hi Team, Posting on behalf of our customer. I&amp;#39;ll share this E2E post with our customer so he can reply when needed. I&amp;#39;m using TICS Pro software to design the register values ​​for the CDCE6214-Q1 offline. The input parameters are: reference clock = 40MHz, doubler = 1, integer = 64, NUM = 0, DEN = 10, PSA = 4, ZDM = OFF, SCC = OFF, DCO = OFF, IOD = 35. OUT1-4 have automatically calculated the required frequency of 18.285714MHz. However, when I press &amp;quot;calculate frequency plan,&amp;quot; the software reports an error saying &amp;quot;invalid out1 frequency.&amp;quot; What could be the reason and how to solve it? Thank you. Regards, Danilo</description><category domain="https://e2e.ti.com/support/clock-timing-group/clock-and-timing/tags/CDCE6214_2D00_Q1">CDCE6214-Q1</category><category domain="https://e2e.ti.com/support/clock-timing-group/clock-and-timing/tags/Wired%2bnetworking">Wired networking</category><category domain="https://e2e.ti.com/support/clock-timing-group/clock-and-timing/tags/CDCE6214">CDCE6214</category></item><item><title>Forum Post: RE: CDC6C: 2.4GHz Emissions Causing Wi-Fi &amp; BT Desense</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1644644/cdc6c-2-4ghz-emissions-causing-wi-fi-bt-desense/6343661</link><pubDate>Wed, 13 May 2026 13:46:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:d84abc79-542e-43e6-9338-37517fa98d55</guid><dc:creator>Adam Lock</dc:creator><description>The differences in package size, operating voltage, and local bypassing are noted. One of the two oscillators we can operate at 1.8V. We will revise the layout. Unfortunately the EVK has a very different layout and bypassing scheme than the CISPR test board. It would be good to know if there were specific emissions that caused the CISPR tests to be run on a different PCBA. If it was specifically due to emissions in the 2.4-2.5G band that would give me confidence in keeping the component in our design for the next build (revised layout, smaller package).</description></item><item><title>Forum Post: RE: CDC6C: 2.4GHz Emissions Causing Wi-Fi &amp; BT Desense</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1644644/cdc6c-2-4ghz-emissions-causing-wi-fi-bt-desense/6343650</link><pubDate>Wed, 13 May 2026 13:41:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:c71fbacd-9611-45c1-a66c-52730a7f82f8</guid><dc:creator>Adam Lock</dc:creator><description>The state behavior is correct. We currently have XTAL testing in process. We expect results tomorrow.</description></item><item><title>Forum Post: RE: CDC6C: 2.4GHz Emissions Causing Wi-Fi &amp; BT Desense</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1644644/cdc6c-2-4ghz-emissions-causing-wi-fi-bt-desense/6343546</link><pubDate>Wed, 13 May 2026 12:34:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:a99e0261-523f-4085-86f5-b86ab6869e96</guid><dc:creator>Grzegorz Pelikan</dc:creator><description>Hi Adam, Conor If board from https://www.ti.com/lit/an/snaa438a/snaa438a.pdf works OK then I would try something like that with 2-4 additional 0402 or smaller X7R MLCC decoupling caps. I would also consider using IC in smaller package like DLX or DLY. Regards, Grzegorz</description></item><item><title>Forum Post: RE: CDCE6214: CDCE6124 syntonized clock servo</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1645331/cdce6214-cdce6124-syntonized-clock-servo/6343374</link><pubDate>Wed, 13 May 2026 10:04:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:6a70ce73-b68e-4f9c-8a10-2363d21de33f</guid><dc:creator>Tobias Greuter</dc:creator><description>CDCE6214-Q1: Output Clock Pull Range - can I 24MHz Xtal be used as SECREF?</description></item><item><title>Forum Post: RE: LMK05318B: LMK05318B: The output signals are lost when the CHX_SYNC_EN bit is dynamically modified</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1643873/lmk05318b-lmk05318b-the-output-signals-are-lost-when-the-chx_sync_en-bit-is-dynamically-modified/6343354</link><pubDate>Wed, 13 May 2026 09:46:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:472b61aa-e644-43eb-94b0-9d62378e73db</guid><dc:creator>Angela Romerom</dc:creator><description>Hi Connor, This is my configuration, also I provide my .txt and .tcs configuration files: e2e.ti.com/.../5460.LMK05318B.tcs e2e.ti.com/.../LMK05318B.txt Also I see that when the signal is lost, there are two ways to recuperate the signal, or apply a SYNC or disable the bit CHX_SYNC_EN = 0. Our intention is that when the PLL is programmed for the first time, CH2_3_SYNC_EN and CH5_SYNC_EN are enabled so that both outputs are synchronised, but subsequently the one for channel 5 is disabled because we want to control only the 10 MHz output from channel 2. After that, we want to re-enable the synchronisation for channel 5, and that is when the signal disappears. When we encountered this issue, we tried disabling and re-enabling the various outputs, and the same behaviour occurs with all of them. So yes, you could say that the aim is to initially synchronise the outputs and use SYNC as a selective enable function only for certain outputs.</description></item><item><title>Forum Post: LMK1C1104: Recommended clock buffer for distributing one 8MHz clock to four MCUs</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1645367/lmk1c1104-recommended-clock-buffer-for-distributing-one-8mhz-clock-to-four-mcus</link><pubDate>Wed, 13 May 2026 09:16:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:2353fff6-a9de-480f-a64f-dcc9c0403166</guid><dc:creator>Conor</dc:creator><description>Part Number: LMK1C1104 Hi, We are using four MCUs on a power controller board. Currently, each MCU has its own 8MHz crystal resonator, but we have an issue with clock frequency mismatch between the individual crystals. To solve this, we are considering using one 8MHz clock source and distributing it to all four MCUs. Our conditions are as follows: Clock frequency: 8MHz Number of MCUs: 4 Preferred clock format: CMOS / LVCMOS System supply rail: 5V Output-to-output skew: not mandatory, but lower skew is preferred We think LMK1C1104 may be a possible candidate because it is a 1:4 LVCMOS clock buffer. We understand that LMK1C1104 supports 1.8V / 2.5V / 3.3V operation and has 25ps output skew. Could you please confirm the following points? Is LMK1C1104 the recommended TI device for this application? Although our system is based on a 5V rail, if the MCU clock inputs can accept a 3.3V LVCMOS level, is it acceptable to use LMK1C1104 with a 3.3V supply? If a 5V CMOS clock level is mandatory, does TI have a recommended 5V-capable clock buffer or an alternative solution? Thanks, Conor</description><category domain="https://e2e.ti.com/support/clock-timing-group/clock-and-timing/tags/Industrial%2bAutomation">Industrial Automation</category><category domain="https://e2e.ti.com/support/clock-timing-group/clock-and-timing/tags/LMK1C1104">LMK1C1104</category></item><item><title>Forum Post: CDCE6214: CDCE6124 syntonized clock servo</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1645331/cdce6214-cdce6124-syntonized-clock-servo</link><pubDate>Wed, 13 May 2026 07:55:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:4c88f10c-acef-4622-be72-c5ba5216522c</guid><dc:creator>Tobias Greuter</dc:creator><description>Part Number: CDCE6214 Hi TI team We&amp;#39;re looking to use the CDCE6124 in a clock servo application where we use it to syntonize all local clocks (ADC @ 7.3728MHz , MCU @24 MHz, and MAC/PHY @ 25MHz) to a network timereference (gPTP protocol). Comparing local counters with sync messages the protocol outputs an error estimated to be within 150ppm with sync rate every 125ms. Step size sufficient around 1ppm Is the device suitable for this application? - Can the CDCE6214 continously adjust all frequencies in positive and negative direction, starting from the mentioned nominal frequencies - Is the device suitable to avoid clock glitches when applying change? - REFSEL to low, with an XTAL input as SECREF as a correct choice, no PRIREF? - Based on the example 7.2.3 in the data sheet , how is the frequency best steered in this servo loop? DCO mode on, then with evey correction signal, FREQ_INC_DEC_DELTA gets applied to the numerator, correct? What is the role of the DCO output divider, as exposed in TICSPro? - Any difference between the product versions, regarding registers and controlling the servo? Somewhat related post: (1) CDCE6214-Q1: Output Clock Pull Range - Clock &amp;amp; timing forum - Clock &amp;amp; timing - TI E2E support forums :</description><category domain="https://e2e.ti.com/support/clock-timing-group/clock-and-timing/tags/CDCE6214_2D00_Q1">CDCE6214-Q1</category><category domain="https://e2e.ti.com/support/clock-timing-group/clock-and-timing/tags/CDCE6214">CDCE6214</category></item><item><title>Forum Post: RE: LMX2594: LMX2594: No-Assist VCO Calibration Fails to Lock at -30°C — Some Chips Lock While Others Don't on the Same Board</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1641366/lmx2594-lmx2594-no-assist-vco-calibration-fails-to-lock-at--30-c-some-chips-lock-while-others-don-t-on-the-same-board/6343050</link><pubDate>Wed, 13 May 2026 06:00:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:a4da8885-17d6-4a81-8867-cb567113a9cd</guid><dc:creator>qin yu</dc:creator><description /></item><item><title>Forum Post: RE: LMX2594: LMX2594: No-Assist VCO Calibration Fails to Lock at -30°C — Some Chips Lock While Others Don't on the Same Board</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1641366/lmx2594-lmx2594-no-assist-vco-calibration-fails-to-lock-at--30-c-some-chips-lock-while-others-don-t-on-the-same-board/6343047</link><pubDate>Wed, 13 May 2026 05:57:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:5c76cac1-9d3c-416c-aacc-a83b787f6294</guid><dc:creator>qin yu</dc:creator><description>Hi, We have tried setting VCO_SEL to 4 or 5 initially and calibrating in NoAss mode, but the 12.916 GHz frequency cannot lock. In the 49J batch, at temperatures below -30&amp;#176;C, none of the chips can lock under initial conditions of VCO_SEL = 4 or 5. In the 5AJ batch, at temperatures below -30&amp;#176;C, the chips were able to lock under initial conditions of VCO_SEL = 4 or 5. We tried reducing the SPI speed to below 10M, but this did not resolve the issue. Setting VCO_SEL to 6 initially is the solution we discovered through experimentation.</description></item><item><title>Forum Post: RE: LMX2594: LMX2594: No-Assist VCO Calibration Fails to Lock at -30°C — Some Chips Lock While Others Don't on the Same Board</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1641366/lmx2594-lmx2594-no-assist-vco-calibration-fails-to-lock-at--30-c-some-chips-lock-while-others-don-t-on-the-same-board/6343023</link><pubDate>Wed, 13 May 2026 05:33:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:32ae6431-62b9-4746-85a4-ec07e3f3a772</guid><dc:creator>Noel Fung</dc:creator><description>Hi There, I suggest do not use partial or full assist at the moment, let&amp;#39;s focus on using no assist calibration. 12.916GHz is supported by VCO5 and VCO6. With initial VCO_SEL = 4, calibration is able to select the right VCO. When and where did you get the samples from? Could you also do a VCO data summary of the good and bad devices you have? At room temperature, program the unit to lock to 12.916MHz, readback the VCO data. Try with a lower SPI write speed, such as 10MHz. BTW, do you have series resistor between SPI interface of the device and the programming device?</description></item><item><title>Forum Post: RE: TLC555: Component value setting</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1645060/tlc555-component-value-setting/6342934</link><pubDate>Wed, 13 May 2026 03:58:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:ef3e30ff-48cb-4dc4-bdfe-cd5675a67034</guid><dc:creator>Eileen Hu</dc:creator><description>Hi Ron, Thank you for your reply. If the freq is 400Hz, how to set them? The customer needs another PWM signal with 4 00Hz freq and 50% duty cycle, the other condition is the same. Regards, Eileen</description></item><item><title>Forum Post: RE: LMK04828: Can Not Output SDCLKoutY</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1643771/lmk04828-can-not-output-sdclkouty/6342902</link><pubDate>Wed, 13 May 2026 03:36:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:90830f3f-bad0-4127-9f83-110c229ac59f</guid><dc:creator>馨柔 Chiu</dc:creator><description>I found that the 0x144 register of LMK04828 in our system can NOT be programmed. (That is, value of register 0x144 is always 0x00.) However, the other registers read back the value we wrote. If there is any limitation of specific steps to program 0x144 of LMK04828? Thanks.</description></item><item><title>Forum Post: RE: LMX2595EVM: USB2ANY firmware update failure</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1644742/lmx2595evm-usb2any-firmware-update-failure/6342811</link><pubDate>Wed, 13 May 2026 02:13:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:22503d9b-f13a-44f6-9d31-6f7d0945e937</guid><dc:creator>Hyunki Moon</dc:creator><description>Hi, I tried changing the Windows language to English and retried the firmware update, but the same Memory verification error persists. Unfortunately I do not have access to a Win10 PC. I also tried the oldest version available on the website, TICS Pro v1.7.6.2, but it also requires a firmware update and fails with the same error. At this point, could you please provide a download link for an older version of TICS Pro that works with USB2ANY firmware v2.7.0.0? The only issue is that the current TICS Pro (v1.7.9.1) refuses to communicate without updating to v2.9.1.2, which consistently fails. An older TICS Pro would let me use the EVM immediately while this firmware update issue remains unresolved. Thank you.</description></item><item><title>Forum Post: RE: LMK00105: Availability for data transmission</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1643795/lmk00105-availability-for-data-transmission/6342767</link><pubDate>Wed, 13 May 2026 01:36:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:26122da6-0b16-4e4e-92ad-477c3d40009f</guid><dc:creator>Michael Srinivasan</dc:creator><description>Takashi-san, The LMK00105 should be able to work with data transmission. Thanks, Michael</description></item><item><title>Forum Post: RE: CDCE925: CDCE925 can generate the freq not from I2C</title><link>https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1644786/cdce925-cdce925-can-generate-the-freq-not-from-i2c/6342740</link><pubDate>Wed, 13 May 2026 01:07:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:d9dac35a-32e3-4541-bb1e-6c102f3ba5c2</guid><dc:creator>Jaryd Dukes</dc:creator><description>Hi Sean , We are currently looking into your query, we will get back to you within the next few days. Best, Jaryd</description></item></channel></rss>