Hey!
We are currently using ADS114s06 for one of our designs.
After writing and reading back configuration registers I can say that the communication between the ADC to the controller is fine. Also, we are getting appropriate data output when the input changes.
The issue we are facing is that the error in the raw ADC value is higher in the alternate ADC reset.
That is at the input of 50mV we are expecting to get ~20970 from the ADC, once we will get 20982 which is a reasonable 0.03% error of the full span. But after the power cycle or software reset the ADC, we will get a value in the range of 21080 with an error of 0.33%. Again after doing few a power cycles or the software reset, we go back to a 0.03% error, and again after the power cycle / or ADC reset, it will go bad, so on and so forth.
We first thought that it was some issue with a controller but after resetting the ADC in the main loop we found out that the ADC switches between these to value.
Following is the schematic of ADC
Some more information:
1. The controller is running at 4.194MHz and SPI communication at 2Mhz though lower or higher frequency didn't help with the issue.
2. ADC is set for continuous conversion mode, a gain of 32, low latency filter, 2K SPS and uses internal reference and current sources. Also tried with the single short ADC mode but it too didn't help.