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ADS114S06: hex file

Part Number: ADS114S06
Other Parts Discussed in Thread: ADS124S08, ADS124S06, , ADS114S08

Hi team,

Could you provide the hex file for the follow example code

ADS1x4S08 Firmware Example Codehttps://www.ti.com.cn/cn/lit/zip/sbac159

One of our customers said they were not found in the example code

Thanks,

Amy

  • Hi Amy,

    The example project is not meant to be a firmware demo, but instead is showing how a project might be started and setup.  The binary files for the the device builds is not provided nor do we generally provide the binary for any of the example code or libraries provided by PADC.  The primary files to consider is the ADS124S08.c and .h files.

    The more recent PADC example code projects are based on the device .c and .h files along with a basic hardware abstraction layer (HAL) .c and .h files.  The reason is the code can be more easily adapted to other processors.  Also, due to tools and library updates, it is very difficult to maintain a specific project that works for only one processor type and one hardware implementation.

    Best regards,

    Bob B

  • Hi Bob,

    Thank you for your reply. But I'm sorry, I have expressed my customer's needs incorrectly, the customer needs is the .h files. Could you share it?or where can I find them?

    Thanks,

    Amy

  • Hi Amy,

    The ADS124S08.h file covers both the ADS114S08 and ADS124S08 family of devices.  There is not a separate header file for each device.  The configuration register map is the same.  For the ADS114S06 (or ADS124S06) you would need to alter the .h file by comparing to the datasheet and commenting out those defines that do not apply.

    For the INPMUX (0x02) you would comment out entries for AIN6 through AIN11.  For the IDACMUX (0x07) you would comment out AIN8 through AIN11.  

    The only other difference between the 24-bit version and the 16-bit version are the OFCAL and FSCAL registers.  For the 16-bit version the register 0x0A is now reserved (OFCAL0 for the 24-bit version) and also 0x0D (FSCAL for the 24-bit version) is reserved.

    /* Comment out the following code */
    #define OFCAL0_ADDR_MASK	0x0A
    #define OFCAL1_ADDR_MASK	0x0B
    #define OFCAL2_ADDR_MASK	0x0C
    #define FSCAL0_ADDR_MASK	0x0D
    #define FSCAL1_ADDR_MASK	0x0E
    #define FSCAL2_ADDR_MASK	0x0F
    
    /* and/or replace with the following for 16-bit versions of the device */
    #define OFCAL0_ADDR_MASK	0x0B
    #define OFCAL1_ADDR_MASK	0x0C
    #define FSCAL0_ADDR_MASK	0x0E
    #define FSCAL1_ADDR_MASK	0x0F
    

    Best regards,

    Bob B