Hi
Now VOUT 3.5840V (the position is P2, R9), the target is 3.5888V, up one LSB, but the voltage is 3.5940V, VREF =5V, Sch as below,
Could you please help to analyze what causes it?
thanks!
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Hi
Now VOUT 3.5840V (the position is P2, R9), the target is 3.5888V, up one LSB, but the voltage is 3.5940V, VREF =5V, Sch as below,
Could you please help to analyze what causes it?
thanks!
Hi Neal,
Can you confirm the VDD voltage of the DAC8571? Is it lower than the +5V reference value? Is the VOUT pin oscillating? Try to confirm with an oscilloscope. Can you also confirm that your data is correctly formatted, and that you are only incrementing a single LSB.
Thanks,
Paul
Hi Paul,
The voltage difference between VDD voltage and VREF is (VDD-VREF),+54mV, -15mV, -62mV, -26mV, -2mV, -10mV, +15mV. 7PCS were tested.
Now, I# Sample (+54mV), when adjusting the LSB, the VOUT voltage is wrong, and the output voltage of the other 6 PCS Sample is correct.
Does the voltage difference between VDD and VREF affect the VOUT voltage?
Thanks!
Hi Neal,
The allowed VREF range is 0-VDD. This seems like the cause of issue since your 6 other boards work as expected. Violating the datasheet specifications can cause the device to behave unexpectedly. I've asked the design team if they can give us some insight as to why you saw the output behavior you described. The DAC8571 datasheet has a section on using the external reference to supply the DAC:
You may consider supplying the DAC with the REF5050 so that they will be at the same potential.
Best,
Katlynne Jones