Other Parts Discussed in Thread: AFE7950EVM
Hello,
I want to know how to configure Arria10 FPGA JESD204B of TSW14J57EVM.
Our test configuration:
EVM: AFE7950EVM <-> TSW14J57EVM
Latte script: AFE79xx_EVM_Mode7.py
[Intel JESD 204B IP User Guide for Intel Arria10]
URL: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_jesd204b.pdf
In the Page 14
2.7. Performance and Resource Utilization Table 8. JESD204B Intel FPGA IP Performance
According to above mode 7 TX, Input rate should be 737.28Msps. I’m confusing because I though Arria10 can support Input Rate up to 300 Mhz. Intel JESD204B IP User Guide says ‘Max Link Clock = data rate/40 = 15Gbps/40‘ and it is 375 MHz. It is much less than 737.28 Msps.
Can you please tell me how my thinking is wrong?
Best regards.