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ADS1203: Question about output scale in mode 2

Part Number: ADS1203

The ADS1203IPWT is in our application used in such a way that the negative input pin is tied to ground and mode pins are configured for mode 2, i.e. manchester encoded output using the internal oscillator.

According to the datasheet, I expect a decoded bitstream with arithmetic average over time of 87.5% when Vin_plus - Vin_minus = 320 mV. Instead, I measure 100% average output (decoded) bitstream at slightly under 320 mV.  At 256 mV input voltage the output average is around 90%, rather than 80% as stated in the datasheet. The measured output is 50% when the input voltage is zero and quite linear up to 320 mV voltage in or 100% output average.

In short: my interpretation of the datasheet, page 17, first paragraph, is that the output average should be 50% + (Vin_plus - Vin_minus)*30%/256mV. Instead I measure 50% + (Vin_plus-Vin_minus)*40%/256mV.

The power supply looks good, the voltage on the input is stable during sampling and the output is not heavily loaded.

Am I reading the datasheet incorrectly?

  • Hi Simon,

    it would appear as though the author of the ADS1203 datasheet made a slight calculation error.  if you look at 256mV compared to the clipping voltage of 320mV, you are at 80% of the positive full scale input.  To get the proper 1's density though, you need to look at the the total input range.  You need to look at (Vin + Vclip) / (2*Vclip) so, (256+320)/640 = 0.90 which is what you are seeing.

  • Hello Tom,

    thank you for the quick reply. I understand this as that our implementation with the ads1203 works as intended then, and that we can accept the functionality with a modification to the expected gain.

    It surprises me that the circuit can output a 100% 1's density when manchester encoded, since an input value of +320 mV (or more) then can't be distinguished from an input value - 320 mV (or less). It would make more sense to have the 1's density in mode 2 actually saturate at 12.5% / 87.5% as the datasheet indicates in its current state.

    Big thanks for clarifying this.

  • Hey Simon - 

    Sorry, I missed that part.  In Manchester mode, when you are saturated at FS+ (+320mV), the output code should look like a square wave.  It should also look like a square wave when the input is saturated at FS- (-320mV).  If you look at Figure 3 in the datasheet and then look at the vertical lines defining the "Internal MCLK" (tC1), lets define the first half clock cycle to be "tw1".  When the internal data is saturated at 1, the first half cycle should be '1' on the encoded output - 101010101010101010, etc.  if the data is saturated at '0', the output should be 010101010101010101.