What register writes do I have to perform to enable the test pattern generator within the DDC (Figure 111 in datasheet)? I normally have the DDC disabled in my design. I added the following two writes to my initialization script just after the JESD interface setup:
0x5000 0x01 (Enable Decimation Filter)
0x5037 0x04 (Digital Ramp Test Pattern)
The addition of these two lines caused my JESD interface to not come up.
I have used the JESD204B Link Layer test pattern quite a bit with no issues. I'm trying to use the DDC test pattern to see if there is a deterministic trend between the test pattern values and the jesd "start of multiframe" after power-up and initialization.
-Shawn